Siemens Deploys AI for Chip Design
What happened
Siemens announced it is using agentic artificial intelligence to accelerate the design and verification of integrated circuits. The technology is integrated into its Questa One verification platform, using AI-driven workflows to speed up the register-transfer level (RTL) sign-off process. The system is designed to be flexible, preserving current investments while optimizing performance.
Why it matters
Siemens' presence in the chip design software market was significantly bolstered by its $4.5 billion acquisition of Mentor Graphics in 2017. The move integrated Mentor, a pioneer in electronic design automation (EDA), into Siemens' Digital Industries Software division, aiming to create a comprehensive platform for mechanical, thermal, and electronic design. The "agentic AI" in the new toolkit represents a shift from assistive automation to more autonomous systems. These AI agents can reason, plan, learn, and execute complex, multi-step engineering tasks that previously required significant human intervention. This technology is applied to the Register-Transfer Level (RTL) sign-off, a critical phase in chip design. RTL is an abstraction used to model the flow of signals between registers before the design is physically implemented. The sign-off process verifies that the RTL code is structurally sound and free of issues that could compromise timing or physical integration. The new product is called the Questa One Agentic Toolkit, which works with Siemens' Fuse EDA AI system. It includes specific agents for tasks like generating synthesizable code (RTL Code Agent), checking for design errors (Lint Agent), and automating failure analysis (Debug Agent). This initiative is part of a broader industry trend where all major EDA vendors, including competitors Synopsys and Cadence, are leveraging AI to manage increasing chip complexity. The goal is to accelerate development and improve the quality of advanced designs like 3D-ICs and chiplet-based systems. The EDA market is a significant and concentrated industry, estimated to be worth over $15 billion in 2024. Siemens EDA, along with Cadence and Synopsys, are the dominant players, collectively accounting for more than 85% of total industry revenues.
Key numbers
- Siemens' presence in the chip design software market was significantly bolstered by its $4.5 billion acquisition of Mentor Graphics in 2017.
- The goal is to accelerate development and improve the quality of advanced designs like 3D-ICs and chiplet-based systems.
- The EDA market is a significant and concentrated industry, estimated to be worth over $15 billion in 2024.
- Siemens EDA, along with Cadence and Synopsys, are the dominant players, collectively accounting for more than 85% of total industry revenues.
What happens next
- These AI agents can reason, plan, learn, and execute complex, multi-step engineering tasks that previously required significant human intervention.
- The sign-off process verifies that the RTL code is structurally sound and free of issues that could compromise timing or physical integration.
Quick answers
What happened in Siemens Deploys AI for Chip Design?
Siemens announced it is using agentic artificial intelligence to accelerate the design and verification of integrated circuits. The technology is integrated into its Questa One verification platform, using AI-driven workflows to speed up the register-transfer level (RTL) sign-off process. The system is designed to be flexible, preserving current investments while optimizing performance.
Why does Siemens Deploys AI for Chip Design matter?
Siemens' presence in the chip design software market was significantly bolstered by its $4.5 billion acquisition of Mentor Graphics in 2017. The move integrated Mentor, a pioneer in electronic design automation (EDA), into Siemens' Digital Industries Software division, aiming to create a comprehensive platform for mechanical, thermal, and electronic design. The "agentic AI" in the new toolkit represents a shift from assistive automation to more autonomous systems. These AI agents can reason, plan, learn, and execute complex, multi-step engineering tasks that previously required significant human intervention. This technology is applied to the Register-Transfer Level (RTL) sign-off, a critical phase in chip design. RTL is an abstraction used to model the flow of signals between registers before the design is physically implemented. The sign-off process verifies that the RTL code is structurally sound and free of issues that could compromise timing or physical integration. The new product is called the Questa One Agentic Toolkit, which works with Siemens' Fuse EDA AI system. It includes specific agents for tasks like generating synthesizable code (RTL Code Agent), checking for design errors (Lint Agent), and automating failure analysis (Debug Agent). This initiative is part of a broader industry trend where all major EDA vendors, including competitors Synopsys and Cadence, are leveraging AI to manage increasing chip complexity. The goal is to accelerate development and improve the quality of advanced designs like 3D-ICs and chiplet-based systems. The EDA market is a significant and concentrated industry, estimated to be worth over $15 billion in 2024. Siemens EDA, along with Cadence and Synopsys, are the dominant players, collectively accounting for more than 85% of total industry revenues.
