Fabless Chip Startup Vervesemi Raises $10M
What happened
Vervesemi, a fabless semiconductor startup, has raised $10 million in a Series A funding round. The company focuses on developing custom silicon for edge and AI applications. This investment reinforces the industry trend toward domain-specific, low-power, and potentially RISC-V-compatible chip designs.
Why it matters
- The Series A funding round was led by investor Ashish Kacholia and Unicorn India Ventures, with participation from Roots Ventures, Caperize Fina, and MAIQ Growth Scheme. - Vervesemi was the first startup approved under the Government of India's Design Linked Incentive (DLI) Scheme, which provides financial support to domestic semiconductor design companies. - The company was founded in 2017 by CEO Rakesh Malik and CTO Pratap Narayan Singh, both industry veterans with extensive experience at global semiconductor firms like STMicroelectronics. - Vervesemi is actively developing chips for the aerospace and defense sectors; a data acquisition avionic chip is currently under evaluation with a space customer, and a precision motor-control chip for drones utilizes an indigenous RISC-V microprocessor. - The company's technology integrates machine learning into its analog and mixed-signal designs to enable self-healing and fail-safe mechanisms, enhancing reliability in mission-critical environments. - The open-source nature of the RISC-V architecture, which Vervesemi employs, is gaining traction in aerospace because it allows for full inspection of the register-transfer level (RTL) code, enabling verifiable security for trusted components in sensitive applications. - The new capital is intended to accelerate the commercial rollout of its chip portfolio, expand its IP catalog, and scale its engineering and application teams. - Vervesemi holds a portfolio of over 140 semiconductor IPs, 25 IC products, and 10 granted patents, with strategic partnerships within the Samsung Advanced Foundry Ecosystem (SAFE) and as a UMC IP alliance partner.
Key numbers
- Vervesemi, a fabless semiconductor startup, has raised $10 million in a Series A funding round.
- The company was founded in 2017 by CEO Rakesh Malik and CTO Pratap Narayan Singh, both industry veterans with extensive experience at global semiconductor firms like STMicroelectronics.
- Vervesemi holds a portfolio of over 140 semiconductor IPs, 25 IC products, and 10 granted patents, with strategic partnerships within the Samsung Advanced Foundry Ecosystem (SAFE) and as a UMC IP alliance partner.
What happens next
- The new capital is intended to accelerate the commercial rollout of its chip portfolio, expand its IP catalog, and scale its engineering and application teams.
Quick answers
What happened in Fabless Chip Startup Vervesemi Raises $10M?
Vervesemi, a fabless semiconductor startup, has raised $10 million in a Series A funding round. The company focuses on developing custom silicon for edge and AI applications. This investment reinforces the industry trend toward domain-specific, low-power, and potentially RISC-V-compatible chip designs.
Why does Fabless Chip Startup Vervesemi Raises $10M matter?
The Series A funding round was led by investor Ashish Kacholia and Unicorn India Ventures, with participation from Roots Ventures, Caperize Fina, and MAIQ Growth Scheme. Vervesemi was the first startup approved under the Government of India's Design Linked Incentive (DLI) Scheme, which provides financial support to domestic semiconductor design companies. The company was founded in 2017 by CEO Rakesh Malik and CTO Pratap Narayan Singh, both industry veterans with extensive experience at global semiconductor firms like STMicroelectronics. Vervesemi is actively developing chips for the aerospace and defense sectors; a data acquisition avionic chip is currently under evaluation with a space customer, and a precision motor-control chip for drones utilizes an indigenous RISC-V microprocessor. The company's technology integrates machine learning into its analog and mixed-signal designs to enable self-healing and fail-safe mechanisms, enhancing reliability in mission-critical environments. The open-source nature of the RISC-V architecture, which Vervesemi employs, is gaining traction in aerospace because it allows for full inspection of the register-transfer level (RTL) code, enabling verifiable security for trusted components in sensitive applications. The new capital is intended to accelerate the commercial rollout of its chip portfolio, expand its IP catalog, and scale its engineering and application teams. Vervesemi holds a portfolio of over 140 semiconductor IPs, 25 IC products, and 10 granted patents, with strategic partnerships within the Samsung Advanced Foundry Ecosystem (SAFE) and as a UMC IP alliance partner.
