KAIST builds on‑device AI chip
KAIST researchers unveiled an on‑device AI chip that learns user habits to enable hyper‑personalization in real time without cloud dependency — a development that could power highly adaptive assistive technologies for learning. The chip foreshadows a wave of privacy‑friendly, personalized accessibility features in edtech devices. (koreaherald.com) (en.sedaily.com)
KAIST’s team led by Professor Hoi‑Jun Yoo revealed the chip named “SoulMate” in a March 17, 2026 announcement. (koreaherald.com) SoulMate is described in the ISSCC paper as a 28nm CMOS system‑on‑chip that combines retrieval‑augmented generation (RAG) and Low‑Rank Adaptation (LoRA) to personalize a compact LLaMA3.2‑1B model with ~1,000 context tokens. (ssl.kaist.ac.kr) The semiconductor demonstrates a measured operating power envelope of 9.8–180.5 mW and reports energy efficiencies of 26.3 μJ/token for inference and 56.8 μJ/token for fine‑tuning. (ssl.kaist.ac.kr) KAIST’s implementation claims a user‑interaction latency of about 216.4 ms and cites typical cloud time‑to‑first‑token (TTFT) delays that can exceed 400 ms as a baseline comparison. (ssl.kaist.ac.kr) The system stores dialogue history in a 32 MB on‑device database and uses a 4 MB off‑chip replay buffer to collect user feedback for LoRA‑based updates. (ssl.kaist.ac.kr) KAIST reports that, prior to their optimizations, redundant model updates accounted for roughly 73% of total system energy consumption, a key engineering challenge the team addressed. (ssl.kaist.ac.kr) The research was presented at the International Solid‑State Circuits Conference (ISSCC) 2026 in San Francisco and was selected as a highlight paper where the team demonstrated a working chip that adjusted response style in real time. (koreaherald.com)
