TSMC Signals Cost Discipline
- TSMC says it can produce smaller, faster chips without immediately using ASML's most expensive High-NA EUV machines. - The company unveiled A13 technology, introduced an N2U node, and plans a chip-packaging plant in Arizona by 2029. - The roadmap emphasizes engineering trade-offs and cheaper node options for phones and laptops, not just a relentless capex sprint (reuters.com).
TSMC said on April 22 it can keep shrinking chips through 2029 without buying ASML’s newest High-NA lithography machines, each priced at more than €350 million, or about $410 million. (reuters.com; bloomberg.com) At its North America Technology Symposium in Santa Clara, California, TSMC introduced A13, a new process scheduled for production in 2029, and N2U, a lower-cost 2-nanometer-family option scheduled for 2028. A13 is a direct shrink of A14 and gives 6% area savings from A14, while N2U offers 3% to 4% speed gains or 8% to 10% lower power than N2P. (tsmc.com) Chipmaking starts with drawing tiny circuit patterns onto silicon with extreme ultraviolet light, a process called lithography. High-NA tools sharpen that light to print even finer features, but TSMC Deputy Co-Chief Operating Officer Kevin Zhang said the company can still “harvest the benefit” from its current extreme ultraviolet fleet. (reuters.com; electronicsweekly.com) The company’s roadmap puts more weight on design changes and packaging, the step that links several chips into one processor package. Reuters reported that TSMC said it expects by 2028 to stitch together 10 large logic chips and 20 stacks of high-bandwidth memory, up from current designs such as Nvidia’s Vera Rubin with two compute chips and eight memory stacks. (reuters.com) That packaging step has become a supply constraint for artificial intelligence chips, and TSMC said it plans to open a packaging plant in Arizona by 2029. TSMC had already said in March 2025 that its expanded U.S. investment would include its first American advanced packaging capacity. (reuters.com; tsmc.com) The Arizona push fits a broader U.S. buildout. TSMC says its first Phoenix fab has been in volume production since late 2024, it broke ground on a third Arizona fab in April 2025, and that third fab is slated for N2 and A16 technologies by the end of the decade. (tsmc.com) ASML is still central to TSMC’s roadmap because the older low-NA extreme ultraviolet tools remain the workhorses for these nodes. The change is that TSMC is delaying the jump to the pricier generation, a decision Bloomberg said could leave High-NA out of TSMC production plans through 2029. (bloomberg.com; reuters.com) TSMC’s customers include Nvidia, Apple and Google, and its process choices help set the pace for the wider chip industry. On this roadmap, the company is betting that cheaper tools, denser designs and bigger multi-chip packages can carry the next round of gains without an immediate $400 million machine upgrade. (reuters.com)