Siemens Deploys Agentic AI for Chip Design
Siemens has announced the integration of agentic AI into its Questa One software for designing and verifying integrated circuits. The move aims to significantly speed up the chip design process, particularly the register-transfer level (RTL) sign-off. This AI-driven workflow is designed to help semiconductor companies accelerate their innovation cycles.
The newly announced Questa One Agentic Toolkit is composed of five distinct AI agents designed to tackle specific, time-consuming tasks in the chip verification process. These include an RTL Code Agent for generating code from natural language, a Lint Agent for checking design errors, a CDC Agent for clock domain crossing verification, a Verification Planning Agent, and a Debug Agent for root-cause analysis. This AI integration is a direct response to the widening "verification productivity gap," a growing challenge where the complexity of modern chip architectures—like 3D ICs and chiplet-based systems—is outpacing the ability of engineering teams to manually verify them. Siemens aims to transform isolated tool interactions into intelligent, multi-step workflows that can reason, plan, and execute complex tasks. Early results from customers in the access program show significant productivity gains. Akshay Aggarwal, a senior director of engineering at MediaTek, reported that his engineers became proficient with the toolkit in hours and were able to complete tasks that would typically take days. Another early user, Tsavorite Scalable Intelligence, highlighted the toolkit's ability to enable quick adoption of formal property verification and to auto-fix issues using the Lint Agent. The agentic workflows are powered by technology from a partnership with NVIDIA, specifically leveraging their Llama Nemotron and NIM models. According to Abhi Kolpekwar, a senior vice president at Siemens Digital Industries Software, this allows the system to understand the verification state in real-time, maintaining a comprehensive awareness of the relationships between designs, testbenches, and specifications. The move toward agentic AI is a key trend in the Electronic Design Automation (EDA) industry. Cadence, a major Siemens competitor, recently launched its own "ChipStack AI Super Agent," also claiming it can deliver up to a 10x productivity gain in similar front-end chip design and verification tasks. This highlights a broader industry race to automate and accelerate the chip design process through advanced AI. Synopsys, another industry giant, is also heavily invested in AI-driven EDA with its Synopsys.ai suite, which includes tools for design space optimization and verification. While they have discussed an agentic AI vision that will roll out in stages, Siemens and Cadence appear to be the first to market with comprehensive, named agentic AI platforms. The Questa One Agentic Toolkit is currently available through an early access program. A broader rollout is planned as customers validate the AI's governance controls and integrate the autonomous workflows into their established chip design methodologies.
