Chip bottleneck moved downstream
The semiconductor squeeze is shifting from pure wafer fabrication to packaging, materials and geography, with packaging formats like CoWoS in heavy demand and TSMC reporting strong quarterly growth. Analysts and industry reports note TSMC’s Q1 revenue lift and aggressive investments in Arizona and Taiwan, while partners and suppliers—plus raw gases like helium and neon—are flagged as new choke points. (reuters.com) (fool.com) (digitimes.com)
The chip shortage did not end with wafer production. It moved to the next steps: packaging, materials and the places that control them. (tsmc.com) Taiwan Semiconductor Manufacturing Co. said on April 10 that March revenue rose 45.2% from a year earlier to NT$415.19 billion, lifting first-quarter revenue to NT$1.134 trillion, up 35.1%. The company’s investor calendar shows its full first-quarter 2026 earnings call is set for April 16. (tsmc.com 1) (tsmc.com 2) A chip is only partly finished when it leaves the wafer fab. It still has to be packaged, which means wiring one or more dies into a final module that can connect to memory, power and a circuit board. (tsmc.com) For artificial-intelligence chips, that packaging step has become a manufacturing constraint of its own. Taiwan Semiconductor says its 3DFabric platform combines front-end and back-end technologies including System on Integrated Chips, Chip on Wafer on Substrate and Integrated Fan-Out, all used to link multiple mini-chips into one system. (tsmc.com 1) (tsmc.com 2) Chip on Wafer on Substrate, or CoWoS, is one of those formats. Taiwan Semiconductor describes it as a package that mounts chips on a silicon interposer, a thin connector layer, for artificial intelligence and supercomputing parts that need very dense wiring. (tsmc.com) That helps explain why the pressure has shifted downstream. In its 2024 business overview, Taiwan Semiconductor said demand for leading-edge logic and advanced packaging helped lift revenue 30% in U.S. dollar terms, outpacing the broader foundry industry’s 6% growth. (tsmc.com) The geography is shifting too. On March 4, 2025, Taiwan Semiconductor said it planned to raise its total United States investment to $165 billion, adding three new fabrication plants, two advanced packaging facilities and a research-and-development center in Arizona. (tsmc.com) Taiwan is expanding around the same choke points. Taiwan’s National Science and Technology Council said on March 4 that the island is pushing growth in chip production, packaging and test as artificial-intelligence demand drives new records, and it highlighted collaboration, research and system capabilities as the next phase. (nstc.gov.tw) The supply chain under that packaging build-out is wider than chipmakers alone. DigiTimes reported on April 15 that Taiwan equipment makers are riding demand tied to advanced packaging, underscoring how substrates, tools and specialist suppliers now matter as much as clean-room wafer capacity. (digitimes.com) Raw materials are part of the same story. Reuters and other industry reports have flagged gases such as helium and neon as pressure points because chipmaking and packaging lines use them in cooling, lasers and process tools, even when the headline demand is coming from artificial-intelligence servers. (reuters.com) (forbes.com) So the new question is not only who can print more chips on silicon. It is who can package them fast enough, source the materials steadily enough and build that capacity in more than one place. (tsmc.com 1) (tsmc.com 2)
