Big TSMC capacity push

TSMC plans to massively expand output — the foundry is targeting a quadrupling of capacity to about 130,000 wafers per month by late 2026, a move aimed at meeting heavy chip demand. (x.com) (x.com)

The jam in the artificial intelligence chip boom is no longer just making the silicon. It is the last assembly step, where Taiwan Semiconductor Manufacturing Company glues giant compute chips to stacks of high-bandwidth memory so they can move data fast enough for systems like Nvidia’s H100. (tsmc.com) (nvidia.com) That assembly method is called Chip-on-Wafer-on-Substrate, and it works a bit like building a multilayer sandwich instead of serving parts on separate plates. Taiwan Semiconductor Manufacturing Company says Chip-on-Wafer-on-Substrate is one of its core advanced packaging services, alongside other stacking technologies built for high compute density. (tsmc.com) Now the company is racing to make far more of it. Multiple industry reports say Taiwan Semiconductor Manufacturing Company is targeting about 130,000 Chip-on-Wafer-on-Substrate wafers a month by late 2026, up from roughly 35,000 to 40,000 a month in late 2024. (markets.financialcontent.com) (trendforce.com) (techpowerup.com) The reason this factory step became scarce is memory. High-bandwidth memory comes in vertical stacks, and the graphics processor plus those memory towers have to sit close together on a shared base so the chip can pull huge amounts of data without wasting power. (tsmc.com) (nvidia.com) That design is now standard in the most valuable chips in the market. Nvidia says the H100 is a data center graphics processor for large language models, and those systems depend on the kind of advanced packaging Taiwan Semiconductor Manufacturing Company is expanding. (nvidia.com 1) (nvidia.com 2) Taiwan Semiconductor Manufacturing Company has been telling investors this bottleneck is real. In its January 16, 2025 earnings call, the company said profit was being hit by ramp costs tied to Chip-on-Wafer-on-Substrate expansion, which means it was already spending heavily to add this packaging capacity before the latest push. (tsmc.com) The buildout is not just one building. Industry reports point to new advanced packaging sites in Chiayi and the Southern Taiwan Science Park, while Taiwan Semiconductor Manufacturing Company has also told investors it plans two new advanced packaging facilities in Arizona as part of a broader United States expansion. (trendforce.com) (tsmc.com) Even the waste stream shows how fast this is growing. Taiwan Semiconductor Manufacturing Company said in December 2025 that rising Chip-on-Wafer-on-Substrate output had pushed up demand for “dummy dies,” simple support pieces used to keep packages structurally stable, enough that it built a recycling program to turn scrap wafers into those parts. (tsmc.com) If the 130,000 target is reached on schedule, the shortage in artificial intelligence hardware does not disappear. It just shifts from “can you design a chip” to “can you secure a slot in Taiwan Semiconductor Manufacturing Company’s packaging lines,” which is why this obscure back-end step is starting to matter almost as much as the chip itself. (markets.financialcontent.com) (trendforce.com)

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