TPU demand may squeeze TSMC capacity
Market filings and commentary this week flagged rising TPU demand as a potential driver of advanced‑node foundry allocation pressure at TSMC. The note surfaced alongside a disclosure that Mariner LLC holds a sizable TSMC position — suggesting TPU demand could ripple into supply discussions. (themarketsdaily.com)
Mariner LLC reported owning 545,078 TSMC shares worth $152,213,000 after a 30.6% increase in the stake, according to its most recent SEC‑filed disclosure. (marketbeat.com (marketbeat.com)) Independent capacity trackers show TSMC’s three CoWoS advanced‑packaging backend fabs (AP3, AP5, AP6) are sold out through 2027 with lead times stretching to 52–78 weeks. (siliconanalysts.com (siliconanalysts.com)) Those same trackers estimate NVIDIA has locked roughly 60–70% of total CoWoS capacity, creating a tight remaining supply pool for other accelerator programs. (siliconanalysts.com (siliconanalysts.com)) Multiple industry writeups report Google trimmed its 2026 TPU output target from about 4 million units to roughly 3 million units, citing constrained access to TSMC CoWoS slots. (rallies.ai (rallies.ai)) Supply‑chain reporting says MediaTek has secured Google v7e/v8e TPU orders and has asked TSMC to scale CoWoS wafer allocation by more than sevenfold for those projects, which would materially increase packaging demand. (trendforce.com (trendforce.com)) Analysts also flag that HBM3E stacks (8‑hi and 12‑hi) are fully allocated for 2026 and that HBM3E pricing is up roughly 15–22% year‑over‑year, adding another constrained input for high‑bandwidth accelerators. (siliconanalysts.com (siliconanalysts.com))
