TSMC pushes High‑NA EUV adoption out to at least 2029
- TSMC told customers on April 22 it will keep shrinking chips through A13 in 2029 without ASML’s High-NA EUV scanners, delaying adoption. - The key reason is cost: High-NA tools run roughly €350 million each, while TSMC says today’s EUV still has enough headroom. - That matters because Intel is moving first on High-NA, while TSMC is betting process integration beats earlier tool adoption.
Chipmaking is getting weirder — and more expensive. The basic problem is simple: every new generation needs finer patterns on silicon, but the machines that draw those patterns now cost as much as a skyscraper project. TSMC’s update last week matters because it showed the company can keep pushing forward without buying the newest, priciest lithography tool just yet. On April 22, at its North America Technology Symposium, TSMC laid out a roadmap through 2029 and left ASML’s High-NA EUV machines off the production plan. ### What is High-NA EUV, exactly? EUV is the lithography gear that prints tiny circuit features with extreme ultraviolet light. High-NA is the next version — “NA” means numerical aperture, basically how much detail the optics can resolve. Bigger NA lets chipmakers print smaller features with fewer workarounds. That sounds like an obvious upgrade, but the machines are enormous, power-hungry, and brutally expensive. Estimates around this launch put a High-NA tool near €350 million, far above earlier EUV systems. (electronicsweekly.com) ### What did TSMC actually say? TSMC introduced its A13 process on April 22 and said it remains a direct shrink of A14, with 6% area reduction and full design-rule compatibility with A14 IP. The bigger tell was what did not appear: no High-NA insertion on the road(electronicsweekly.com)that period. (pr.tsmc.com) ### How can TSMC keep scaling without it? Basically, TSMC is squeezing more out of the tools it already knows how to run. That means tighter process integration, smarter patterning tricks, backside power delivery on some nodes, and a roadmap split between different product needs instead of one single march for everyone. TSMC also added N2U and mapped A12(pr.tsmc.com)rchitecture, packaging, and manufacturing flow still offer plenty of gains before High-NA becomes unavoidable. (semiengineering.com) ### Why wait if the technology is better? Because “better” is not the same as “worth it right now.” A new lithography platform does not just add capex. It forces new masks, new process recipes, new yield learning, new factory logistics, and a lot of organizational pain. If current EUV can still hit the density, powe(semiengineering.com)ns more than it helps competitiveness. That is the real message here — TSMC is optimizing the business system, not chasing bragging rights. (money.usnews.com) ### Who does want High-NA sooner? Intel, for one. Intel has been the loudest early adopter of High-NA and has already tied future nodes to the technology. That creates a sharp contrast: Intel is using High-NA as a comeback lever, while TSMC is treating it like a tool to deploy only when the economics force the move. Samsung is also often mentioned as a likely earlier user than TSMC. (trendforce.com) ### Why does this hit ASML? Because TSMC is ASML’s biggest customer, and timing matters almost as much as volume. If the largest foundry says “not before 2029” for production use, investors immediately start reworking the demand curve for High-NA shipments, service revenue, and follow-on orders. That is why ASML shares dipped after the roadmap news landed. (msn.com) ### Is this a technology delay or a strategy choice? More strategy than surrender. TSMC did not say High-NA is unnecessary forever. It said current EUV is still good enough for the next few turns of the roadmap. That is like stretching one runway farther by flying cleaner takeo(msn.com)s no longer just physics. It is physics plus cost, yield, and how much disruption a company can absorb at once. Through 2029, TSMC is betting disciplined execution beats buying the fanciest machine first.
