Hyperscalers push custom AI chips

Artificial intelligence chips are splitting into more specialized roles as Google and Meta push custom silicon deeper into their cloud and data-center stacks. (blog.google) Google said on April 22 it is introducing two new Tensor Processing Unit chips: TPU 8i for fast-response AI agents and TPU 8t for training and serving larger models. The company said the launch came at Google Cloud Next ’26. (blog.google) A Tensor Processing Unit is Google’s in-house AI chip, built for the matrix math that powers model training and inference, or the step where a trained model generates an answer. Google has used TPUs internally for more than a decade and sells access to them through Google Cloud. (blog.google) Google’s chip lineup had already been moving toward narrower jobs. At Cloud Next 2025, the company introduced Ironwood, its seventh-generation TPU, and said it was the first TPU designed specifically for inference rather than general-purpose training. (blog.google) Meta is making the same bet from a different angle. On April 15, Meta and Broadcom said they expanded their partnership to co-develop multiple generations of Meta Training and Inference Accelerator chips, with Broadcom’s support planned through 2029. (about.fb.com, investors.broadcom.com) Broadcom said the initial commitment for that Meta buildout exceeds 1 gigawatt and is the first phase of a multi-gigawatt rollout for AI data centers. Meta said the chips are intended to help run AI across its apps and services at lower total cost for specific workloads. (investors.broadcom.com, about.fb.com) Meta said in March that it is developing and deploying four new generations of custom chips within two years, a faster cadence than a typical chip cycle. The company said those parts are aimed at ranking, recommendations and generative AI workloads. (about.fb.com) Nvidia still anchors much of the market with GPUs, or graphics chips repurposed for AI, and it has been adapting to the custom-silicon push rather than ceding it. In May 2025, Nvidia introduced NVLink Fusion, which lets partners connect semi-custom chips into Nvidia’s interconnect system. (nvidianews.nvidia.com) The result is a more mixed backend for developers: Nvidia GPUs in some clusters, Google TPUs in others, and Meta-style in-house accelerators inside the biggest platforms. That makes software layers that can move models, training jobs and inference workloads across different hardware more central to how AI systems get built. (blog.google, about.fb.com, nvidia.com) The chip race is no longer just about buying more Nvidia boxes. It is increasingly about who can design, connect and keep busy the right mix of silicon for each AI job. (blog.google, about.fb.com)