Siemens Integrates Agentic AI into Chip Design Software
Siemens has introduced agentic AI capabilities into its Questa One platform for integrated circuit design and verification. The new AI-driven workflows are designed to accelerate the register-transfer level (RTL) sign-off process by combining automated agents with configurable human expertise. The goal is to speed up complex chip design cycles while maintaining verification accuracy.
The application of agentic AI in Electronic Design Automation (EDA) is a significant shift from assistive automation to more autonomous, goal-oriented systems. These AI agents can independently reason, plan, and execute complex chip design tasks, aiming to enhance productivity and speed up time-to-market. The global EDA market is largely led by Siemens, Synopsys, and Cadence, all of which are integrating AI into their toolchains to manage increasing design complexity. The register-transfer level (RTL) sign-off is a critical and often bottleneck phase in chip design. It involves verifying that the high-level hardware description language (HDL) code is structurally sound and ready for synthesis into a gate-level design. Errors found late in the process can trigger extensive and costly rework, making early and efficient verification at the RTL stage crucial. Siemens' Questa One Agentic Toolkit specifically targets this bottleneck with five distinct AI agents: RTL Code Agent, Lint Agent, CDC (Clock Domain Crossing) Agent, Verification Planning Agent, and Debug Agent. This approach is designed to automate and streamline tasks like code generation, error checking, and failure analysis. Early user MediaTek reported that its engineers became proficient with the toolkit within hours, noting "immediate and significant" productivity gains. For defense applications, the ability to rapidly design and verify custom silicon is a strategic imperative. The Department of Defense relies on custom chips for everything from satellites to hypersonic missiles, where performance in extreme environments is critical. Siemens is a key technology supplier to U.S. government agencies and was the first EDA provider to join DARPA's Toolbox Initiative, giving the agency's vendors access to its tools for developing advanced ICs. Accelerating chip design cycles directly impacts the development of next-generation robotic and autonomous systems. These systems require specialized, power-efficient processors for real-time decision-making at the tactical edge, often in environments with limited connectivity. Faster, more reliable verification of complex Systems-on-a-Chip (SoCs) enables quicker iteration and deployment of the advanced perception, computer vision, and control hardware that underpins modern robotics. The move towards agentic AI in EDA is part of a broader industry trend to handle the exponential growth in chip complexity, with transistor counts now exceeding 200 billion on a single chip. Competitors like Synopsys and Cadence are also heavily invested in AI-driven platforms such as Synopsys.ai and Cadence.AI, respectively. This competitive landscape is driving innovation aimed at raising the level of design abstraction, potentially allowing engineers to use natural language specifications to drive the entire design process.