TSMC expands Arizona plans, tweaks roadmap
- Taiwan Semiconductor Manufacturing Co. used its April 22 North America Technology Symposium in Santa Clara to debut its A13 process and confirm an Arizona advanced-packaging plant is now under construction. - TSMC said A13 is a direct shrink of A14 with 6% area savings and backward-compatible design rules, while deputy COO Kevin Zhang said Arizona CoWoS and 3D-IC capacity is due before 2029. - The update extends TSMC’s roadmap through 2029 without high-NA extreme ultraviolet tools, underscoring cost pressure around next-generation chipmaking equipment. (datacenterdynamics.com)
Taiwan Semiconductor Manufacturing Co. used its April 22 symposium in Santa Clara to unveil its A13 chip process and say its Arizona advanced-packaging plant has started construction. (tsmc.com) (usnews.com) Chip packaging is the step that connects finished silicon dies into one working product, and it has become a choke point for artificial-intelligence chips that combine multiple pieces of silicon and memory. Reuters reported that TSMC plans to open the Arizona packaging plant by 2029. (usnews.com) Kevin Zhang, TSMC’s deputy co-chief operations officer and senior vice president, said the company will build CoWoS and 3D-IC capability in Arizona before 2029. He said many chips made in Arizona still have to return to Taiwan for packaging today. (usnews.com) On the manufacturing side, TSMC said A13 is a direct shrink of the A14 node it announced in 2025. The company said A13 delivers 6% area savings from A14, keeps full backward compatibility for design rules, and is scheduled for production in 2029. (tsmc.com) A14 is still the earlier stop on that roadmap. TSMC said in April 2025 that A14 is planned for production in 2028 and is designed to improve speed, power use, and logic density versus N2. (tsmc.com) TSMC also previewed A12 and introduced N2U at the same event. The company said A12, aimed at artificial intelligence and high-performance computing, is due in 2029, while N2U is scheduled for 2028. (tsmc.com) The roadmap matters because advanced packaging now shapes where artificial-intelligence systems can actually be assembled, not just where wafers are fabricated. Reuters said Nvidia and other companies rely on these packaging steps because their latest processors are built from several chips joined together. (usnews.com) TSMC is also stretching that roadmap without adopting high-numerical-aperture extreme ultraviolet tools for these announced nodes. Data Center Dynamics, citing Reuters reporting from the event, said those machines cost about $370 million each. (datacenterdynamics.com) That leaves TSMC trying to line up process technology, packaging, and U.S. manufacturing on roughly the same end-of-decade schedule. For customers building artificial-intelligence chips, the Arizona plant and the A13 timeline now point to 2029 as the next big date. (tsmc.com) (usnews.com)