Hyperscalers double down on custom chips
Meta announced four generations of MTIA chips as a move to reduce NVIDIA dependency, while Amazon’s Trainium has already landed big names — both trends point to hyperscalers building hardware moats. That push is likely to ripple into enterprise and startup buying decisions as hyperscalers tout cost and energy benefits. (x.com) (webpronews.com)
Meta’s MTIA roadmap names four new SKUs—MTIA 300, 400, 450 and 500—and Meta said the chips will be developed and deployed over the next two years with MTIA 300 already moving into production and fleet use. Industry reporting describes MTIA‑3 (codenamed “Iris” in some outlets) as being designed for advanced packaging on TSMC’s 3nm node with external support from Broadcom and third‑party back‑end partners for CoWoS‑style packaging. Meta’s public post explicitly ties the MTIA family to inference and recommendation workloads — ranking, recommendations and GenAI inferencing — and calls out HBM bandwidth as a primary performance lever for those use cases. AWS’s Trainium footprint now spans multiple generations with AWS and TechCrunch reporting roughly 1.4 million Trainium chips deployed across three generations and Project Rainier bringing nearly 500,000 Trainium2 chips online for Anthropic. OpenAI’s expanded AWS pact includes a commitment to consume approximately 2 gigawatts of Trainium capacity and coincides with Amazon’s announced $50 billion investment tied to expanded AWS distribution of OpenAI’s Frontier platform. AWS and reporting outlets attribute Trainium’s commercial wins to a claimed 30–40% lower cost-per‑useful‑work and improved energy efficiency versus some GPU clusters, and AWS says Anthropic’s Claude now runs predominantly on Trainium2 instances. Taken together, public commitments quantify the emerging hyperscaler hardware moats: Meta’s multi‑SKU MTIA roadmap through 2027, AWS’s 1.4M+ Trainium installs and OpenAI’s ~2GW consumption pledge create concrete, near‑term demand signals that could redirect large‑scale training and inference workloads onto hyperscaler‑owned silicon.
