Alibaba debuts RISC‑V AI chip
Alibaba unveiled a new RISC‑V processor targeted at agentic AI workloads, signaling a hardware shift in cloud and systems stacks toward open ISA designs. The announcement points to increased demand for engineers who can optimize compilers, runtime, and distributed inference on new silicon. (social post)
DAMO Academy introduced the XuanTie C950 at the XuanTie RISC‑V Ecosystem Conference in Shanghai on March 24, 2026. (bloomberg.com) Alibaba says the C950 is built on a 5‑nanometer process and reaches a maximum clock of 3.2 GHz while posting a SPECint2006 score above 70, a record for RISC‑V CPUs. (pandaily.com) Technical disclosures describe an out‑of‑order superscalar core with an 8‑instruction decode stage, a 16‑stage pipeline and an out‑of‑order window exceeding 1,000 instructions, plus support for full RVA23/RISC‑V optional extensions. (trendforce.com) Alibaba and industry reports state the C950 integrates a self‑developed AI acceleration engine and is presented as natively compatible with large models such as Qwen3 and DeepSeek V3 for on‑chip inference. (trendforce.com) The chip effort sits inside Alibaba’s T‑Head semiconductor organization, which the company says has shipped roughly 470,000 units and crossed about RMB 10 billion in annualized revenue as of February 2026. (trendforce.com) Trade press and analysts flagged potential foundry ties to TSMC for the 5nm part, and Alibaba’s public materials emphasize customization for specific inference patterns rather than immediate mass external sales. (trendforce.com) DAMO’s materials claim the C950 delivers more than a 30% performance improvement over some mainstream products, and market reaction to the launch included a roughly 3% uplift in Alibaba’s stock in early trading. (cnbc.com)
