TSMC supply squeezes packaging, memory
- Nvidia has reserved most of Taiwan Semiconductor Manufacturing Co.’s top CoWoS packaging capacity, shifting the immediate AI chip bottleneck from wafer fabrication to final assembly. - TSMC told CNBC its CoWoS business is growing at an 80% compound annual rate, while SK Hynix said its 2026 chip output is sold out. - Tight HBM memory and packaging supply now shape AI server deliveries, even as TSMC delays High-NA EUV use until 2029. (cnbc.com)
Advanced packaging — the step that turns finished silicon into a working AI processor — has become the next choke point for Nvidia and TSMC. Nvidia has reserved most of TSMC’s top-end packaging capacity, according to CNBC. (cnbc.com) That packaging method is called CoWoS, short for chip-on-wafer-on-substrate. It links logic chips and high-bandwidth memory in one package, which is what Nvidia’s data-center accelerators need. (cnbc.com) TSMC packaging executive Paul Rousseau told CNBC the company’s most advanced packaging is expanding at an 80% compound annual growth rate. TSMC is adding two packaging sites in Taiwan and starting its first U.S. advanced-packaging facilities in Arizona this year. (cnbc.com) The squeeze does not stop at packaging. TrendForce said on April 2 that high-bandwidth memory and advanced packaging both remain in tight supply, even as Nvidia and Advanced Micro Devices push higher-priced AI server systems. (trendforce.com) High-bandwidth memory, or HBM, is the stacked memory sitting beside the processor inside the package. Without enough HBM, a finished AI chip cannot ship in volume even if the compute die itself is ready. (trendforce.com) (finance.yahoo.com) SK Hynix, Nvidia’s key HBM supplier, said in October 2025 that all of its 2026 chip production was already sold out. Reuters reported the company planned to raise investment sharply on expectations of a longer AI-driven chip cycle. (finance.yahoo.com) Micron has also said its 2026 HBM output is fully booked, adding to the sense that memory suppliers are allocating next year’s AI demand well in advance. That means cloud customers can face delays even after they secure GPU orders. (finance.yahoo.com) The result is a supply chain with multiple gates instead of one. A company now needs advanced wafers from TSMC, CoWoS slots to assemble them, and HBM stacks from SK Hynix, Micron, or Samsung to complete the module. (cnbc.com) (trendforce.com) That pressure is spilling into equipment decisions. Reuters reported on April 15 that ASML raised its 2026 forecast on AI demand, but Bloomberg reported on April 22 that TSMC does not plan to use ASML’s High-NA extreme ultraviolet tools in production before 2029 because of cost. (money.usnews.com) (bloomberg.com) So the AI chip shortage story has moved past wafers alone. In April 2026, the pace of deliveries is being set by the slower pieces around the chip: packaging lines, memory stacks, and the tools needed to expand both. (cnbc.com) (trendforce.com)
