Siemens Deploys Agentic AI to Speed Up Chip Design

Siemens' agentic AI is part of a broader industry shift in Electronic Design Automation (EDA), where AI is crucial for managing the escalating complexity of chip design. The company has been incorporating AI for over two decades, but the recent focus is on a hybrid approach using generative and agentic AI at the front end, with machine and reinforcement learning on the back end. This new architecture opens up previously siloed databases into a unified data lake, allowing AI agents to access information across different design tools. The specific problem Siemens is targeting is RTL sign-off, a critical phase where the Register-Transfer Level (RTL) code, which describes a chip's functionality, is verified before the costly manufacturing process begins. Errors found late in the design cycle, such as clock domain crossing (CDC) bugs, can lead to a "chip respin," effectively starting the manufacturing process over. Shifting this verification "left" to the RTL stage is more efficient, as fixing issues in the code is far cheaper than correcting them in the physical chip. The "agentic" part of the AI means the system can act autonomously to solve complex problems, not just follow instructions. In chip design, this translates to AI agents that can generate and evaluate design prototypes, identify potential design violations for engineers to review, and automate routine tasks. Siemens claims its Aprisa AI tool can improve productivity by up to 10 times and achieve a 10% improvement in power, performance, and area (PPA), key metrics in chip design. This move mirrors a larger trend, with competitors like Synopsys also heavily investing in AI-driven EDA. Synopsys launched its DSO.ai (Design Space Optimization AI) in 2020, which uses reinforcement learning to optimize chip designs and has been used in over 100 commercial chips. This new era, sometimes called 'EDA 4.0', uses AI to handle the massive data volumes and complexity of modern semiconductor design. For developers in the startup ecosystem, the underlying technologies are becoming more accessible. The integration of NVIDIA NIM microservices and Nemotron models into Siemens' platform points to the use of powerful, pre-existing AI models. This trend of AI-native EDA is also being pursued by startups like Alpha Design AI, which is building its ChipAgents product to boost RTL design and verification productivity. The agentic AI in Siemens' Questa One is designed to make engineers faster and more efficient, not replace them. It automates tedious tasks like stimulus generation for tests and helps simplify the massive amounts of data produced during verification. By handling these lower-level tasks, engineers can focus on more complex, architectural problems that require human ingenuity. This approach of creating an "agentic AI workforce" is seen as a necessary step to close the gap between the growing complexity of chip designs and the limited supply of semiconductor engineers. The AI acts as a junior engineer, learning from the decisions of senior engineers to automate workflows and accelerate the entire design and verification process.