Cadence cuts verification to one day

Cadence said on June 1 that it had moved its chip-design AI from assisted workflows to what it called a fully autonomous virtual engineer. The company unveiled the update at Computex 2026, saying its ChipStack AI Super Agent can execute end-to-end verification tasks without step-by-step human prompting. Cadence said the system is built on its electronic design automation software, uses NVIDIA Nemotron models, and runs inside NVIDIA OpenShell. Shares of Cadence rose in early trading on Monday after the announcement. ### What exactly did Cadence announce? Cadence said the new release extends its ChipStack AI Super Agent to “Level-5 autonomy,” a label the company uses for a system that can independently execute complex chip-design and verification workflows while still allowing engineers to inspect or guide the process. The announcement framed that as a shift from AI copilots and prompt-driven tools toward software that can orchestrate long design sequences on its own. (businesswire.com) Anirudh Devgan, Cadence’s chief executive, said in the company statement that the move was “the next step” from AI assistance to autonomous virtual engineers that can perform “real design and verification work” in secure, governed environments. Cadence tied the launch to a broader push it began earlier this year around agentic design automation. (businesswire.com) ### Why is verification the part Cadence is emphasizing? NVIDIA supplied the clearest operating example in Cadence’s release. The companies said NVIDIA engineers run millions of tests and consume billions of compute hours each year to verify chip designs, making verification one of the most time- and compute-intensive parts of semiconductor development. (businesswire.com) Cadence said its autonomous flow can compress verification work that typically takes about five weeks to less than 24 hours. That claim matters because verification often sits on the critical path before signoff, when bugs, regressions and test coverage gaps can delay tapeout. Cadence had already marketed ChipStack as an agentic workflow for coding, testbench creation, regression orchestration, debugging and issue fixing, with earlier claims of up to 10-fold productivity gains. (financialcontent.com) ### Where does NVIDIA fit into the system? NVIDIA’s role is both model provider and infrastructure partner. Cadence said the autonomous engineer is built with NVIDIA Nemotron models and secured by NVIDIA OpenShell runtime, which the companies described as the environment used to run these long-lived agents. (businesswire.com) The two companies have been widening their partnership for months. In March, they said they were developing accelerated engineering systems for agentic AI chip and system design, and in April they expanded that collaboration across Cadence’s AgentStack and related engineering software. That makes the June 1 launch less a one-off product drop than the newest step in an existing Cadence-NVIDIA integration effort. (businesswire.com) ### Why did investors react so quickly? Cadence shares were up 4.24% to $390.81 by 10:33 a.m. EDT on June 1, according to Yahoo Finance market data. Other market coverage earlier Monday reported an 8.7% premarket gain after the announcement. That reaction reflects how investors are treating AI claims that attach to measurable engineering bottlenecks. In this case, Cadence did not just say its tools are smarter; it attached the release to a specific workflow, a named partner, and a concrete before-and-after time claim. (businesswire.com) Forbes described the product as the first example of a Level 5 AI EDA agent automating design verification from a months-long effort to one day. (finance.yahoo.com) ### What still has to happen before this becomes standard customer practice? Cadence said engineers can still inspect, guide and collaborate with the system, which suggests the software is being positioned first inside governed design environments rather than as a fully unsupervised replacement for verification teams. The harder next step is customer deployment inside real signoff flows, where audit trails, coverage targets and handoff discipline matter as much as raw runtime. (forbes.com) That last point is an inference from how chip verification is typically used in production programs, supported by Cadence’s emphasis on secure and governed environments. The second half of 2026 is the next date to watch. Market reports citing the launch said full autonomous functionality is planned for select customers and early-access partners later this year, while NVIDIA’s own engineering teams are already using the platform in production environments. (parameter.io) (businesswire.com)