TSMC CoWoS wafers at $10,000 ASP
- TrendForce reported April 28 that TSMC’s CoWoS advanced-packaging wafers are selling for about $10,000 each as AI accelerator demand keeps supply tight. - The report said TSMC’s CoWoS capacity could reach about 1.3 million units in 2026 and 2 million in 2027, with packaging near 10% of revenue. - TSMC says CoWoS capacity has expanded sharply, but AI chip and HBM demand still centers packaging in the supply chain. (eetimes.com)
TSMC’s CoWoS packaging has become expensive enough to look like a leading-edge chip node, with wafers now selling for about $10,000. (trendforce.com) CoWoS stands for chip-on-wafer-on-substrate. It is the step that bolts a logic chip together with high-bandwidth memory and wiring, turning separate pieces into one AI processor package. (tsmc.com) (electronicsweekly.com) TrendForce, citing Commercial Times, said that roughly $10,000 average selling price now puts a CoWoS wafer near the level of a 7-nanometer wafer. The same report said advanced packaging reached about 10% of TSMC’s 2025 revenue. (trendforce.com) The capacity numbers are now large enough to matter at company scale. TrendForce said investors project about 1.3 million CoWoS units in 2026 and 2 million in 2027 as TSMC expands supply. (trendforce.com) TSMC’s own roadmap shows why demand keeps climbing. At its 2026 Technology Symposium, the company said it is already producing 5.5-reticle CoWoS packages and plans a 14-reticle version in 2028 that can link about 10 compute dies and 20 HBM stacks. (tsmc.com) (electronicsweekly.com) That roadmap turns packaging into a performance lever, not a back-end afterthought. Bigger packages let chip designers add more memory and more compute in one module without waiting for a single giant die. (semiengineering.com) (tsmc.com) TSMC also says the squeeze may be easing at the margin. EE Times reported that TSMC’s Kevin Zhang said CoWoS capacity had grown enough “to be able to address” customer demand at this point, even as the company keeps expanding. (eetimes.com) But the broader AI supply chain is still constrained by more than logic wafers. Advanced packaging and high-bandwidth memory have to scale together, and memory suppliers have separately warned that HBM supply is heavily allocated through 2026. (notebookcheck.net) (trendforce.com) The result is that packaging now sits much closer to the center of TSMC’s profit engine and the AI industry’s bottleneck map. A process once treated like assembly is now priced, planned, and rationed like leading-edge silicon. (trendforce.com) (eetimes.com)
