TSMC Equipment Delay
- TSMC said it will delay adoption of ASML's newest High-NA EUV machines because of cost concerns. - Bloomberg reported the delay pushes High-NA use toward 2029, stressing chipmakers' equipment-cost squeeze. - TSMC still plans an Arizona chip-packaging plant by 2029, underscoring packaging's strategic role in AI chip supply chains. ( )
TSMC said it will wait until 2029 to use ASML’s newest High-NA chipmaking machines, arguing the tools cost too much for production now. (bloomberg.com) Chief executive C.C. Wei said on April 22 that TSMC can keep shrinking chips with its current extreme ultraviolet, or EUV, tools instead of buying the latest High-NA versions right away. Bloomberg reported the delay applies to production use through 2029. (bloomberg.com) ASML’s High-NA systems sell for more than €350 million, about $410 million, apiece, according to Bloomberg. ASML says the first High-NA system was delivered in December 2023 and that the platform is aimed at high-volume manufacturing in 2025 and 2026. (bloomberg.com, asml.com) Lithography is the step that prints circuit patterns onto silicon, and High-NA is ASML’s newer version for drawing finer features. TSMC’s decision shows the industry’s cost fight has shifted from whether the machines work to whether customers can earn enough from them. (asml.com, bloomberg.com) TSMC paired that message with a roadmap update: Bloomberg said its A13 process is scheduled for production in 2029 without High-NA. Reuters separately reported TSMC told customers it can keep improving speed and power efficiency with existing EUV tools and manufacturing changes. (bloomberg.com, usnews.com) The other bottleneck is no longer only making the chip, but assembling several chips into one package for artificial intelligence systems. Reuters reported TSMC plans to open an advanced packaging plant in Arizona by 2029 for CoWoS and 3D-IC, two methods used to combine chips and memory in one module. (finance.yahoo.com) That Arizona plan follows TSMC’s January earnings call, when the company said it was applying for permits to start construction of its first advanced packaging plant at an existing Arizona site. Reuters said the facility is meant to reduce reliance on overseas packaging capacity for U.S. AI chip production. (finance.yahoo.com) The split is stark: TSMC is delaying the most expensive new front-end tool while still adding back-end packaging capacity in the United States. For ASML, the next test is whether other chipmakers move faster on High-NA before TSMC does. (bloomberg.com, asml.com)
