Samsung and NVIDIA Advance HBM4 Memory for AI Accelerators
Samsung has reportedly pulled ahead in the development of High-Bandwidth Memory 4 (HBM4) through a partnership with NVIDIA. The next-generation memory technology is crucial for improving the speed and bandwidth needed to sustain the performance of future GPUs and AI ASICs, particularly for high-performance embedded AI applications.
- The JEDEC standard for HBM4 specifies a 2048-bit memory interface, which is double the 1024-bit interface of its predecessor, HBM3e. This wider bus allows HBM4 to achieve significantly greater bandwidth, potentially reaching over 2 TB/s per stack, even at more modest clock speeds. - Samsung has announced that its HBM4, which began mass production shipment in February 2026, achieves a stable data processing speed of 11.7 gigabits-per-second (Gbps). This performance, which can be enhanced up to 13 Gbps, exceeds the JEDEC standard of 8 Gbps by about 46%. - NVIDIA's next-generation AI accelerator platform, codenamed "Rubin," is the primary driver for HBM4 adoption and is expected to launch in 2026. To manage supply and performance tiers, NVIDIA is reportedly implementing a "Dual Bin" strategy, using the highest-performing HBM4 for its top-tier accelerators and slightly lower-spec versions for other products. - For the first time, major designers like NVIDIA and AMD are creating customized HBM4 by implementing their own logic on the memory's base die. This allows for more efficient data routing and processing, which can cut latency and is particularly beneficial for AI inference workloads. - The competitive landscape for HBM supply is a three-way race between Samsung, SK Hynix, and Micron. While SK Hynix has been the market leader, both Samsung and Micron have also begun mass production and shipment of HBM4, with all three expected to be part of NVIDIA's supply chain. - Samsung's HBM4 design incorporates its 6th-generation 1c DRAM process and a 4nm logic die, which has resulted in a 40% improvement in power efficiency compared to HBM3E. The new design also enhances thermal resistance by 10% and heat dissipation by 30%. - HBM4 technology allows for taller stacks of DRAM dies, moving from 12-Hi in HBM3e to a standard of 16-Hi. This increases the potential memory capacity per stack, with Samsung offering capacities from 24GB to 36GB and planning for 48GB with 16-layer stacking. - Following the initial HBM4 launch, an even faster variant known as HBM4E is expected to arrive. Samsung anticipates sampling HBM4E in the second half of 2026, with custom HBM samples tailored to specific customer needs becoming available in 2027.
