RRAM CiM write‑and‑verify idea

A recent paper proposes an RRAM‑based analog compute‑in‑memory write‑and‑verify scheme called Hadamard‑Encoded Parallel‑Verify to reduce read‑noise variance. The approach modifies write/verify flows across the array to improve analog inference stability. (x.com)

Resistive random-access memory stores numbers as conductance levels, like setting thousands of tiny dimmer switches, and a new April 14 paper says it can verify those settings with less noise by reading columns in Hadamard-coded patterns instead of one cell at a time. (arxiv.org) In analog compute-in-memory, those conductance levels are the neural-network weights, and the array performs matrix math where the data already sits, cutting the energy spent moving values between memory and processors. Nature reported in 2022 that this approach aims to avoid “power-hungry data movement” in conventional designs. (nature.com) The weak point is programming the weights accurately. The new paper says write-and-verify is essential for multi-level resistive random-access memory, but under lower voltages and low signal-to-noise conditions, the verify read itself starts to limit mapping accuracy, convergence speed, and energy. (arxiv.org) The authors, Ilhuan Choi, Jiwon Yoo, Yoona Lee, Yewon Jeong, Jason Jaesung Lee, and Woo-Seok Choi, posted the paper to arXiv on April 14, 2026. They call the main method Hadamard-Encoded Parallel-Verify, or HD-PV, and say it swaps conventional one-hot verify reads for N orthogonal Hadamard patterns across an N-cell column. (arxiv.org) In plain terms, the scheme reads a whole column through a coded set of patterns and then mathematically decodes the result, instead of checking each cell with a separate direct probe. The paper says that basis change cuts uncorrelated read-noise variance by a factor of N and cancels common-mode disturbances without increasing the column-level read count. (arxiv.org) The same paper adds a second method called Hadamard-based analog-to-digital-converter-energy-reduced Parallel-Verify, or HARP. It says write-and-verify only needs three decisions — raise, lower, or keep — so HARP replaces successive-approximation-register conversions with compare-only operations. (arxiv.org) The reported gains show up under noisy conditions. On CIFAR-10, CIFAR-100, and keyword spotting, the authors say conventional write-and-verify lost more than 20 percentage points of accuracy on CIFAR-10 under severe read noise, while HD-PV and HARP held the loss to 0.6 and 1 percentage point with the same memory footprint. (arxiv.org) The comparison in the paper is not against a straw man. The authors say engineers can already average multiple reads to suppress noise, but HD-PV and HARP matched that accuracy with up to 6.1 times and 3.5 times lower latency, and 6.2 times and 9.5 times better energy efficiency, respectively. (arxiv.org) That fits a longer line of work in resistive-memory chips, where researchers have already built on-chip write-and-verify circuits to tighten weight distributions before inference. IEEE papers in 2021 and 2022 described 40-nanometer resistive random-access memory compute-in-memory macros with on-chip write-and-verify for reliable multi-bit operation. (ieeexplore.ieee.org 1) (ieeexplore.ieee.org 2) The new claim is narrower: the authors say this is the first use of Hadamard-encoded verification for resistive random-access memory write-and-verify. For a field that already knows how to store weights in analog memory, the paper shifts attention to how the chip checks those weights when the read path gets noisy. (arxiv.org)

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