TSMC’s next chokepoint: packaging

The hard part of making artificial intelligence chips is no longer only the wafer fab. It is increasingly the packaging step that turns many chip pieces into one working processor. (tsmc.com) Packaging is the assembly stage after a wafer is cut into chips: the pieces are mounted, wired together, and connected to memory and a substrate so they can ship as a finished part. Taiwan Semiconductor Manufacturing said in its 2024 annual report that demand for its “advanced packaging” technologies helped drive a 30% jump in 2024 revenue in U.S. dollar terms. (tsmc.com) For the biggest artificial intelligence processors, that packaging is not a simple box around one chip. Taiwan Semiconductor Manufacturing’s CoWoS, short for Chip-on-Wafer-on-Substrate, links several chiplets and high-bandwidth memory into one larger module, which is why the company groups it with its three-dimensional integration tools. (tsmc.com) That matters in Arizona because wafers made there still do not complete the whole trip on site. On March 3, 2025, Taiwan Semiconductor Manufacturing said its expanded Arizona plan would add three more fabs, two advanced packaging facilities, and a research center, bringing its total announced U.S. investment to $165 billion. (tsmc.com) The gap is timing. Taiwan Semiconductor Manufacturing said in January 2025 that it had started producing 4-nanometer chips for U.S. customers in Arizona, while the packaging plants in its March 2025 expansion plan were still future projects. (gpec.org) That leaves a supply chain split between front-end manufacturing and back-end assembly just as artificial intelligence customers order more complex parts. CNBC reported on April 8, 2026 that Nvidia had reserved most of Taiwan Semiconductor Manufacturing’s most advanced packaging capacity, tightening the same step needed to finish top-end graphics processors and accelerators. (cnbc.com) The pressure shows up in Taiwan Semiconductor Manufacturing’s numbers. The company reported first-quarter 2026 revenue of NT$1.13 trillion, or about $35.6 billion, up 35% from a year earlier, as demand for advanced semiconductors stayed strong. (cnbc.com) Taiwan Semiconductor Manufacturing has been telling investors that packaging is now part of its core capacity build-out, not a side operation. In its 2024 annual report, the company said it was expanding advanced packaging in Chiayi and Tainan and investing in packaging and chip-stacking technologies including CoWoS, Integrated Fan-Out, and System on Integrated Chips. (tsmc.com) The United States is trying to fill some of that back-end gap outside Taiwan Semiconductor Manufacturing’s own campus too. Amkor broke ground in Peoria, Arizona, on October 6, 2025 for a semiconductor advanced packaging and test campus and later raised the planned investment to $7 billion. (amkor.com) Nvidia’s October 2025 celebration of the first Blackwell wafer made at Taiwan Semiconductor Manufacturing’s Phoenix fab showed both progress and the remaining bottleneck. A wafer can be produced in Arizona, but the finished artificial intelligence chip still depends on the slower, scarcer packaging step that the industry is now racing to build. (nvidia.com)