Google shifts some TPUv8e packaging from TSMC CoWoS to Intel's EMIB

- Google is reportedly moving packaging for part of its next TPU program to Intel Foundry, using EMIB for the TPU v8e inference chip. - Google introduced TPU 8t and TPU 8i on April 22; supply-chain reports tie MediaTek to the inference design and Intel to v8e packaging. - The shift follows tight CoWoS capacity as hyperscalers look for second sources in advanced packaging. (trendforce.com)

Google is reportedly shifting packaging for part of its next Tensor Processing Unit program from Taiwan Semiconductor Manufacturing Co.’s CoWoS to Intel Foundry’s EMIB technology. (trendforce.com) Packaging is the step that turns separate chip pieces and memory into one working module, and it has become a bottleneck for artificial-intelligence hardware. EMIB, short for Embedded Multi-die Interconnect Bridge, links chiplets inside the package without a full silicon interposer. (trendforce.com) The Google chip in question is reported as TPU v8e, part of the company’s next TPU generation due in 2027. Trade publication Commercial Times, cited by TrendForce and other follow-on reports, said Google could use Intel EMIB for that package. (trendforce.com) (onmsft.com) Google publicly unveiled its eighth-generation TPU family on April 22 at Cloud Next 2026, splitting the line into TPU 8t for training and TPU 8i for inference. Google said the two-chip approach reflects a widening gap between the needs of model training and real-time serving. (blog.google) (cloud.google.com) Google said TPU 8t scales to 9,600 chips in one superpod, while TPU 8i is tuned for low-latency inference and reinforcement learning. In its technical write-up, Google said the new systems are aimed at “the full AI lifecycle,” from training to serving. (cloud.google.com) Supply-chain reporting in Taiwan points to a more divided supplier map behind those chips. Commercial Times reported MediaTek is involved in Google’s TPU 8 program, and a separate Commercial Times report said MediaTek is participating in TPU 8t with I/O die and backend design services built on TSMC N3P and CoWoS-S. (ctee.com.tw 1) (ctee.com.tw 2) That leaves Google with one packaging path reportedly staying with TSMC and another moving to Intel. The reported split matches Google’s public decision to separate training silicon from inference silicon inside the same TPU generation. (ctee.com.tw) (cloud.google.com) Intel has been pushing advanced packaging as a foundry selling point while it works to win more outside customers. TrendForce reported on April 7 that Google and Amazon were among the companies weighing Intel’s EMIB packaging for custom artificial-intelligence chips, citing earlier reports and Intel disclosures about customer commitments in the second half of 2026. (trendforce.com) The pressure point is capacity. TrendForce said customer interest in Intel packaging has been driven in part by constrained CoWoS supply at TSMC, whose advanced packaging footprint remains heavily concentrated in Taiwan. (trendforce.com) Google has not publicly confirmed Intel as a TPU packaging supplier, and Commercial Times said the company declined to discuss supply-chain partners when asked about parts of the TPU 8 program. Until Google, Intel or TSMC names the package flow directly, the TPU v8e shift remains a supply-chain report rather than a formal announcement. (ctee.com.tw) (trendforce.com)

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