RISC‑V safety SDK advances
MIPS and Green Hills Software launched a Safety SDK for RISC‑V microcontrollers, a sign the RISC‑V toolchain and safety ecosystem are maturing for embedded AI and safety‑critical tasks reported. That narrows a gap for automotive and industrial adopters evaluating RISC‑V cores.
A Business Wire release dated March 9, 2026 detailed the collaboration between MIPS — a GlobalFoundries company — and Green Hills on a jointly developed Safety SDK for RISC‑V microcontrollers (mips.com). The announcement specifies the SDK targets the top functional‑safety certifications, explicitly naming ASIL‑D for automotive and SIL 3/4 for industrial use cases such as motor control, traction inverters, and battery management (mips.com). Listed SDK components include the MIPS Atlas M8500 (M8500) processor, Green Hills’ µ‑velOSity RTOS, the MULTI® development toolchain, Optimizing C/C++ compilers, the DoubleCheck™ static analyzer, plus evaluation platforms and motor‑control demonstrations for qualified customers (mips.com). MIPS described the M8500 as a real‑time, multi‑threaded architecture intended for safety‑critical EV and industrial workloads and highlighted that automotive‑qualified SoC platforms can be built using multiple lock‑stepped M8500 cores for scalable safety implementations (mips.com). Green Hills had previously expanded its safety‑certified µ‑velOSity platform to support Arm and RISC‑V microcontrollers on March 11, 2025, indicating an existing software baseline the new SDK can leverage for certification pathways (ghs.com). The partners said they are currently “gathering requirements from early access customers,” and the press release notes SDK artefacts and evaluation hardware will be made available to qualified customers, with no general‑availability date specified in the announcement (mips.com).
