Intel pivots to advanced packaging
- Intel is moving a data-center chip assembly and packaging line from Costa Rica to Ho Chi Minh City while broadening EMIB packaging deployment. (digitimes.com) - The sharpest detail is the Vietnam site’s expected addition of more than 2,700 high-tech jobs as Intel consolidates server-chip back-end work there. (en.vneconomy.vn) - That matters because Intel is chasing AI demand through packaging bottlenecks, where EMIB-T is pitched as an alternative to scarce CoWoS capacity. (community.intel.com)
Advanced packaging is the part of chipmaking that turns a pile of separate dies into one usable product. For AI chips, that step has become a chokepoint a(digitimes.com)Intel shifted a data-center chip assembly and packaging line from Costa Rica to Vietnam and, at the same time, kept pushing EMIB as the thing that could win it outside customers in AI. (digitimes.com) ### What exactly changed? Intel is relocating a production line tied to data-center chips from Costa Rica to its Ho C(community.intel.com)ve makes it more central to Intel’s global manufacturing map for higher-value data-center products. Intel had already signaled a broader consolidation of Costa Rica assembly and test work into Vietnam and Malaysia, so this is the concrete follow-through. (digitimes.com) ### Why does packaging matter so much now? Because modern AI chips are too big and too power-(digitimes.com)dies — all stitched together inside one package. If you cannot package those pieces tightly and cheaply, the fancy front-end wafer process does not save you. Intel has been leaning hard into this idea with its “systems foundry” pitch, where packaging and test are not side services but part of the product. (intel.com) ### What is EMIB, in plain English? EMIB is Intel’s way of linking chiplets side by side using tiny silicon bridges embedded in the package substrate. Think of it as buildin(digitimes.com)nder everything. That can lower cost and give designers more flexibility. Intel’s newer EMIB-T version adds through-silicon vias and is aimed at very large AI and HPC packages that need to scale beyond normal reticle limits. (newsroom.intel.com) ### Why are Google and Amazon in the conversation? Because hyperscalers increasingly design their own AI chips, and those chips need advanced packaging whether Intel makes the compute d(intel.com)ng work with Google and Amazon for custom AI processors, with EMIB or EMIB-T as the hook. The important part is not just the names. It is the business model shift — Intel trying to sell the hard integration layer even when it is not the unquestioned leader in every process node. (trendforce.com) ### Why move this work to Vietnam? Cost, scale, and footprint discipline(newsroom.intel.com)ify a manufacturing network it previously expanded too broadly. Moving back-end work to a larger Southeast Asian hub fits that logic. Local coverage says the transfer could create more than 2,700 high-tech jobs, which tells you this is not a token line shuffle. (community.intel.com) ### Is this really a comeback strategy? Basically, yes — but not the old version of an Intel comeback. The old dream was simple: retake unquestioned proce(trendforce.com)hat customers need you anyway. That is especially relevant while AI packaging demand is outrunning supply and rivals’ capacity stays tight. (intel.com) ### What is the catch? Packaging is a real opportunity, but it is not a free win. Intel still has to prove yields, customer trust, and volume execution. EMIB is already in production, and Intel says EMIB-T can scale to packag(community.intel.com)source for AI packaging. (intel.com) ### Bottom line? Intel is not just trying to make better chips. It is trying to become the company that can assemble the AI era’s most complicated ones when packaging capacity is the real scarce asset. Moving more data-center back-end work to Vietnam and pushing EMIB harder are two parts of the same bet. (digitime([intel.com)ing-production-expansion.html))