AI is hitting packaging limits

The choke point in artificial intelligence chips is no longer just making the silicon. It is the step after that, where the chip gets wrapped into a working part with memory, wiring, and heat handling, and CNBC reported on April 8 that Nvidia has reserved most of Taiwan Semiconductor Manufacturing Company’s top-end packaging capacity. (cnbc.com) That packaging step is what turns several small pieces of silicon into one finished accelerator, the kind of graphics processing unit that goes into an artificial intelligence server. Taiwan Semiconductor Manufacturing Company told CNBC its main method, called Chip on Wafer on Substrate, is growing at an 80% compound annual rate. (cnbc.com) Chip on Wafer on Substrate works like mounting an engine, transmission, and fuel system onto one frame instead of building one giant machine from a single block. It lets companies place logic chips next to high-bandwidth memory, which is the stacked memory used to keep artificial intelligence processors fed with data fast enough to stay busy. (intel.com) (cnbc.com) The reason companies do this is that a single chip can only be so big before it runs into the reticle limit, which is the maximum area a chip factory can print in one exposure. Intel said in March that advanced packages now let customers build devices more than 6 times that reticle size today, with a path past 8 times this year. (intel.com) So even if a factory can make more wafers, that does not automatically create more usable artificial intelligence hardware. The wafers still need substrates, bridges, testing, and final assembly, and CNBC said almost all of that most advanced work still happens in Asia. (cnbc.com) That is why Nvidia booking the majority of the available top-end lines matters to everyone else. If one customer takes most of the slots at the packaging house, rivals can have finished chips waiting for the same final assembly bottleneck, the way cars pile up when one paint shop is full. (cnbc.com) The squeeze is spreading beyond the package itself into the board underneath it. Zhen Ding, a major printed circuit board supplier, said on April 8 that server, optical communications, and integrated circuit substrate demand tied to artificial intelligence is driving sequential growth and a new expansion phase in 2026. (digitimes.com) (mopsov.twse.com.tw) Integrated circuit substrates are the dense base layers that connect the chip package to the rest of the server, like a city street grid under a skyscraper. Ibiden said last month that demand for integrated circuit package substrates for artificial intelligence servers still exceeds its capacity. (ibiden.com) (docs.publicnow.com) Intel is trying to turn that bottleneck into a business. CNBC reported that Intel’s packaging customers already include Amazon and Cisco, and that Elon Musk tapped Intel on April 8 to package custom chips for SpaceX, xAI, and Tesla at the planned Terafab site in Texas. (cnbc.com) Taiwan Semiconductor Manufacturing Company is also expanding, with its first United States advanced packaging facilities in Arizona starting this year alongside two new sites in Taiwan. But new packaging lines take time to build, qualify, and fill with trained workers, so the industry can add more silicon faster than it can add finished accelerators. (cnbc.com) The result is that the artificial intelligence hardware race is starting to look less like a contest over who can etch the smallest transistor and more like a contest over who can secure the whole chain after the wafer. In 2026, the scarce parts are increasingly the hidden ones: the package, the substrate, the board, and the links that let the chip leave the factory as a working machine. (cnbc.com) (digitimes.com)