TSMC sketches roadmap through 2029

Chip manufacturing keeps shrinking transistors, but the gains now come in steps, not one giant jump. TSMC used its April 22, 2026 symposium to lay out those steps through 2029. (tsmc.com) TSMC debuted A13 at the event and said the process is scheduled to enter production in 2029, one year after A14. The company also previewed A12, an A14-based enhancement for artificial intelligence and high-performance computing chips. (tsmc.com) A process node is the recipe a foundry uses to build chips, not a literal ruler reading. TSMC’s newer names like A16, A14, A13 and A12 mark capability tiers that mix transistor design, wiring and power delivery changes. (tsmc.com 1) (tsmc.com 2) For A13, TSMC said design rules stay fully backward compatible with A14, which lets customers move existing designs with less rework. The company said A13 delivers a 6% logic-area reduction, up to 15% speed gain at the same power, or 25% lower power at the same speed versus A14. (tsmc.com) For A12, the new piece is backside power delivery, which moves power wiring to the back of the wafer so signal wiring on the front has more room. TSMC brands that feature Super Power Rail and says A12 is aimed at AI and high-performance computing parts entering production in 2029. (tsmc.com) That splits TSMC’s roadmap into two tracks. A14 and A13 target broad client and mobile designs, while A16 and A12 lean toward bigger chips that need more power delivery and packaging help. (tsmc.com 1) (tsmc.com 2) Packaging is the other half of the story. Instead of one monolithic chip, many advanced processors now stitch together multiple chiplets, memory and interconnects inside one package. (synopsys.com) Synopsys said on April 22 that it expanded silicon-proven intellectual property, electronic design automation flows and 3D integration support across TSMC’s 3-nanometer and 2-nanometer families, plus A16 with Super Power Rail and A14. It also highlighted support for TSMC’s 3DFabric packaging technologies through its 3DIC Compiler tools. (synopsys.com) For companies building Apple-class mobile chips, AI accelerators or server processors, that means the node name alone says less than it used to. Memory layout, thermals, power delivery and package design now decide how much of the promised gain shows up in a finished device. (tsmc.com) (synopsys.com) The roadmap TSMC sketched this week points to a slower, more granular cadence: A14 in 2028, then A13 and A12 in 2029, with different chip classes getting different upgrades. (tsmc.com 1) (tsmc.com 2)