Analysis: GPU Scheduling Can Create Hidden Bottlenecks
Recent academic analysis reveals that hardware-accelerated GPU scheduling, while boosting throughput for ML workloads, can introduce non-deterministic latencies. This is especially problematic in mixed-criticality systems common in aerospace, where hard real-time guarantees are essential. The research suggests FPGAs remain preferable for flight-critical tasks due to their deterministic execution, while hybrid FPGA-GPU architectures may be a path forward if timing risks can be modeled and mitigated.
- The primary obstacle to using GPUs for flight-critical functions is the difficulty of certifying their complex software drivers under the DO-178C standard. The non-deterministic nature of GPU schedulers and the large, often proprietary, codebase make the verification and validation required for high Design Assurance Levels (DAL) prohibitively expensive compared to FPGAs, which are certified as hardware under DO-254. - Non-deterministic latency in GPUs is largely a result of their non-preemptive scheduling, which is designed to maximize throughput. A long-running, low-priority task can occupy the processor, preventing a high-priority, time-critical task from executing immediately and thus breaking real-time guarantees. - FPGAs offer deterministic execution because they are configured with custom hardware logic for specific tasks, bypassing the need for a software scheduler for those operations. This allows for extremely low and predictable latency, which is a key requirement for the rapid control loops found in flight control and sensor fusion systems. - Hybrid FPGA-GPU systems are being implemented in applications like advanced radar processing. In these architectures, the FPGA performs the initial, low-latency signal processing, while the GPU is used for less time-sensitive but more computationally intensive downstream tasks, such as AI-driven target classification. - Real-time operating systems (RTOS) used in avionics often
