TSMC forecasts $1.5T chip market

- TSMC told investors on May 14 the global semiconductor market could exceed $1.5 trillion by 2030, raising its prior $1 trillion outlook. (money.usnews.com) - TSMC said AI and high-performance computing would make up 55% of that market, while CoWoS packaging capacity is forecast to grow above 80%. (money.usnews.com) - In 2026, TSMC plans nine phases of wafer fab and advanced packaging builds; Arizona tool move-in is set for second-half 2026. (money.usnews.com)

TSMC raised its long-range view of the chip industry on May 14, telling investors the global semiconductor market could exceed $1.5 trillion by 2030. The new figure replaces a prior $1 trillion forecast and was laid out in presentation materials ahead of the company’s technology symposium in Hsinchu, Taiwan. (money.usnews.com) Reuters reported that the revision was tied to stronger expectations for artificial intelligence and high-performance computing demand. TSMC also paired the market call with a fresh set of manufacturing targets, including faster growth for leading-edge chips and advanced packaging. ### Why did TSMC lift the forecast so sharply? TSMC said AI and high-performance computing are now expected to account for 55% of the projected $1.5 trillion market by 2030. (money.usnews.com) Smartphones would represent 20%, and automotive applications 10%, according to the company’s materials released before the symposium in Hsinchu. The company also said AI accelerator wafer demand is projected to increase 11-fold from 2022 to 2026. That matters because the current AI buildout is not limited to chip design; it also depends on foundry capacity, packaging, and the ability to assemble large processor-and-memory stacks at scale. Reuters identified that demand profile as the main reason TSMC raised the industry outlook. (money.usnews.com) ### Why is CoWoS packaging showing up in the middle of a market forecast? TSMC said capacity for CoWoS — short for Chip on Wafer on Substrate — is forecast to grow at more than an 80% compound annual rate from 2022 to 2027. The packaging technology is widely used in AI chips, including Nvidia designs, because it helps combine compute chips with high-bandwidth memory in a single package. (money.usnews.com) That packaging target is one of the clearest signals in the presentation because it points to where the bottlenecks are. In recent AI deployments, chip output has depended not only on leading-edge wafer starts but also on advanced packaging lines that can finish those processors for shipment. TSMC’s numbers show it expects that part of the supply chain to keep expanding rapidly through 2027. (money.usnews.com) ### What does TSMC say it is building to meet that demand? TSMC said it has been expanding capacity at a faster pace in 2025 and 2026 and plans nine phases of wafer fabs and advanced packaging facilities in 2026. The company also projected a 70% compound annual growth rate from 2026 to 2028 for capacity tied to its 2-nanometer and next-generation A16 technologies. (money.usnews.com) In Arizona, the first fab is already in production, while tool move-in for the second fab is planned for the second half of 2026, according to the same materials. Construction of a third fab is underway, and work on a fourth fab and the site’s first advanced packaging facility is expected to begin this year. TSMC said Arizona output should rise 1.8 times year-on-year by 2026, with yields comparable to Taiwan. (money.usnews.com) ### Where do Japan and Germany fit into the picture? TSMC said its first Japan fab is already in volume production for 22-nanometer and 28-nanometer products. Plans for a second fab in Japan were upgraded to 3-nanometer in response to what the company described as strong demand. (money.usnews.com) Germany remains on a slower but still active track. TSMC said the fab there is under construction and progressing as scheduled, with initial technologies planned at 28-nanometer and 22-nanometer, followed later by 16-nanometer and 12-nanometer. ### How does the Apple-Intel report fit into this story? (money.usnews.com) Apple has reportedly begun testing production of some Apple-designed chips at Intel, with 2026 described as a testing ramp and 2027 as the target for full production and shipment, according to AppleInsider’s account of analyst Ming-Chi Kuo’s report. The report said Intel’s output would initially cover only a limited share of Apple’s needs and that TSMC would still supply more than 90% of Apple processors. (money.usnews.com) That leaves the Apple-Intel effort looking more like contingency and diversification than a near-term shift in foundry leadership, based on the reported timeline. For TSMC, the immediate picture in its own materials is still one of rising AI wafer demand, aggressive CoWoS expansion, and new capacity coming online across Taiwan, Arizona, Japan, and Germany through 2026 and beyond. (money.usnews.com) (appleinsider.com)

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