TSMC shifts to packaging
- TSMC plans to open a chip-packaging plant in Arizona by 2029 to expand advanced packaging capabilities for AI chips. - It showcased CoWoS growth, planning a 14-reticle package that could combine roughly ten large compute dies and twenty HBM stacks by 2028. - At the same time TSMC will delay High-NA EUV adoption until 2029, signalling cost discipline in packaging versus next-gen lithography (reuters.com) (businesswire.com) (bloomberg.com).
TSMC plans to add advanced chip packaging in Arizona by 2029, extending its U.S. footprint beyond wafer fabrication. (reuters.com) Packaging is the step that turns several pieces of silicon and memory into one working processor, and it has become a choke point for artificial intelligence chips. TSMC deputy co-chief operations officer Kevin Zhang said construction has begun and the Arizona site will add CoWoS and 3D-IC packaging before 2029. (reuters.com) TSMC said its current CoWoS packages already reach 5.5 reticles, a measure of package size tied to the maximum area a chip tool can expose in one shot. At its April 22 symposium, the company said a 14-reticle CoWoS package is slated for 2028 and could combine about 10 large compute dies with 20 stacks of high-bandwidth memory. (businesswire.com) That is a different way of pushing performance than shrinking transistors alone. Instead of relying only on a smaller logic node, chip designers are stitching together more compute tiles and more memory inside one package to feed AI systems that need huge bandwidth. (businesswire.com) (reuters.com) TSMC paired that packaging push with a more cautious stance on the next lithography tool. Zhang said the company has no current plan to use ASML’s High-NA extreme ultraviolet machines through 2029, citing cost, while still putting its A13 process into production in 2029. (bloomberg.com) (businesswire.com) The price gap is large enough to shape roadmaps. Bloomberg reported that High-NA EUV tools cost more than €350 million, or about $410 million, each. (bloomberg.com) Arizona also helps solve a geography problem. Apple and Nvidia already buy chips made at TSMC’s Arizona fab, but many of those chips still have to return to Taiwan for advanced packaging before they can ship as finished parts. (reuters.com) TSMC is not the only company trying to close that gap in the U.S. Amkor said in 2024 that it was working with Apple and Nvidia on an Arizona packaging plant targeted for mid-2027 construction completion and early 2028 production, and Zhang said TSMC’s talks with Amkor on technology options are still ongoing. (reuters.com) The near-term map from Santa Clara was straightforward: bigger packages in 2028, a new Arizona packaging base by 2029, and no rush into ASML’s most expensive tool before then. (businesswire.com) (reuters.com) (bloomberg.com)