SEMIFIVE tapes out 8nm eMRAM SoC

Edge AI chips are hitting a wall that has nothing to do with raw compute. The problem is memory — moving weights back and forth burns power, adds latency, and makes “run it locally” much harder than the demos suggest. That is why this SEMIFIVE and ICY Tech tape-out matters. On May 7, the two companies said they completed an 8nm edge-AI SoC built on Samsung Foundry’s 8LPU embedded MRAM process, with a design aimed at running models up to roughly 2 billion parameters on-device. ### Why is eMRAM the interesting part? eMRAM is non-volatile memory baked into the logic process, so it keeps data without constant refresh and can sit much closer to compute than off-chip DRAM. Basically, that gives designers a way to cut standby power and reduce the energy cost of fetching model data over and over. Samsung has been pitching embedded MRAM as a fit for low-power AI, automotive, and industrial chips for exactly that reason. (prnewswire.com) ### What did the companies actually build? This was not just a memory macro dropped into a generic chip. SEMIFIVE says it turned ICY Tech’s architecture into production-ready silicon, while ICY Tech brought custom MRAM bit-cell peripheral circuitry and a processing-near-memory approach. The result is an SoC that tries to keep more of the model and more of the data movement on chip, which is the whole point of using exotic memory in the first place. (prnewswire.com) ### What does “processing near memory” buy you? Think of it like moving the kitchen next to the pantry instead of sprinting groceries across the house every minute. In AI chips, the expensive part is often not the multiply itself but the shuttling of weights and activations. Processing-near-memory tries to shrink that travel distance. That matters more at the edge than in a data center, because edge devices live inside brutal power and thermal limits. (prnewswire.com) ### Why mention 2 billion parameters? Because that is the line that makes this sound less like a microcontroller story and more like a serious local-inference play. A 2B-parameter target is still far below giant cloud models, but it is large enough to matter for AI PCs, robotics, and other devices that need useful language or vision capability without always calling home. The companies explicitly pointed to AI PCs and humanoid robots as target markets. (prnewswire.com) ### Why is tape-out important but not final? Tape-out means the design is done and sent for manufacturing. That is a real milestone — bugs are now expensive, and the next proof comes from silicon, not slides. But tape-out is not volume production. The chip still has to come back, boot, validate, hit power targets, and survive packaging and test. In advanced nodes with unusual embedded memory, that bring-up phase is where a lot of ambition meets physics. (tmcnet.com) ### Why does SEMIFIVE matter here? SEMIFIVE is not the model company in this story — it is the design house and ASIC integrator. That matters because edge-AI customers increasingly want custom silicon without building a full chip team from scratch. SEMIFIVE has been pushing a platform-based model for custom SoCs, and it already has a track record of taking AI chips into mass production on Samsung processes. (prnewswire.com) ### So what is the bigger signal? The signal is that memory is becoming the product, not just the plumbing. If edge AI keeps shifting toward local inference, the winners will not just be whoever has the best NPU block. They will be the teams that can co-design memory, compute, packaging, and validation into one low-power system. This tape-out does not prove that market is won. But it does show where the next fight is moving. (semifive.com) (prnewswire.com)