Heaviside Chip AI
A new model called Heaviside claims to design AI chips with novel, 'alien' electromagnetic structures—using simulation-trained models that the post says run ~800,000× faster than traditional methods. If true, this could compress hardware design cycles for custom accelerators. (x.com)
A Nature Communications paper (Dec. 30, 2024) titled “Deep‑learning enabled generalized inverse design of multi‑port radio‑frequency and sub‑terahertz passives and integrated circuits” demonstrates an AI inverse‑design flow that co‑synthesizes arbitrary electromagnetic structures with active circuits. (nature.com) Princeton’s Sengupta lab and university press materials say the method can synthesize complex EM structures “in minutes” where conventional topology‑search and solver workflows previously required weeks of expert effort. (engineering.princeton.edu) The Nature Communications team disclosed a related U.S. provisional patent application filed June 17, 2024 (provisional application #63/660,874) covering the deep‑learning synthesis flow. (nature.com) Lead author Kaushik Sengupta described the AI‑generated geometries as unusually shaped and “random” — layouts the team calls unintuitive for human designers yet able to deliver improved broadband and scattering properties in demonstrations. (engineering.princeton.edu) Independent peer‑reviewed papers and recent industry announcements around AI‑assisted EM design report speedups in the range of minutes‑vs‑weeks or up to roughly 10^3× for surrogate/physics‑informed emulators (examples: Princeton/Nature Communications, Altair’s PhysicsAI, Vinci’s foundation‑model claims), but no reputable paper or major vendor report corroborates an “~800,000×” acceleration figure. (nature.com) The published demonstrations and press coverage focus on millimeter‑wave and sub‑terahertz passives and power‑amplifier co‑design (multi‑port scattering and impedance engineering), not on general‑purpose digital accelerator layouts or entire SoC design flows. (nature.com)
