TSMC eyes Arizona packaging expansion
- TSMC is accelerating plans to add advanced chip packaging in Arizona, building on its 2024 Amkor tie-up to support U.S. customers by 2029. - The clearest detail is the existing Arizona blueprint: Amkor’s $2 billion Peoria site, where TSMC already said InFO and CoWoS could be used. - That matters because packaging — not wafer fabrication alone — has become the AI bottleneck, pulling talent to MediaTek and giving Intel another opening.
Advanced packaging is the part of the chip business that used to sit in the background. Not anymore. AI chips are so big, hot, and expensive now that the hard problem is often not making the silicon — it is stitching multiple dies together, feeding them memory, and shipping them in volume. That is why the latest move around TSMC’s Arizona buildout matters: the company appears to be pushing harder on U.S. packaging, not just U.S. wafer fabs. ### What is the actual news? The new piece is timing and intent. Digitimes reported in late April that TSMC aims to open an Arizona packaging facility by 2029, which lines up with a broader push to localize more of the chip flow in the U.S. That is not coming out of nowhere — in October 2024, TSMC and Amkor formally announced a partnership to bring advanced packaging and test capabilities to Arizona for customers using TSMC’s Phoenix fabs. ### Why does packaging matter so much? Because the leading AI chip is no longer one slab of silicon. It is a package — logic dies, HBM memory, interconnect, substrate, thermals, and yield management all bundled into one monster product. TSMC’s own Arizona partnership highlighted InFO and CoWoS, two of the company’s key advanced-packaging methods, because proximity between front-end wafer cycle times and simplify logistics. ### Why Arizona? Basically, co-location. TSMC already has a major manufacturing footprint in Phoenix, with more than 3,000 employees on site. Amkor’s Arizona project in Peoria is a planned $2 billion packaging facility with a target of 2,000 jobs by 2028. Put those together and you get the outline of a domestic chain: wafers made nearby, then packaged and tested nearby, instead of bouncing across the Pacific for the last critical steps. ### What does Douglas Yu have to do with this? A lot, symbolically. Digitimes reported on May 2 that Chen-Hua “Douglas” Yu — a retiring TSMC veteran and one of the company’s best-known R&D leaders in advanced packaging — joined MediaTek after leaving TSMC in 2025. MediaTek framed the hire as a way to deepen foundry ties, but the bigger read is simple: packaging expertise is now strategic talent, not back-office process knowledge. ### Where does Intel fit in? Intel has been trying to turn packaging into a competitive wedge for years. Its EMIB and Foveros technologies are built around the same broad industry shift — bigger multi-die systems that need more sophisticated
