NASA chip claims 500× performance gain
- NASA’s Jet Propulsion Laboratory said on May 12 that it had begun testing a next-generation radiation-hardened space processor under its HPSC project. - NASA said the chip is designed for up to 100 times current spaceflight computing capacity, with early functional tests showing about 500 times performance. - NASA’s HPSC project page and JPL testing update identify Microchip Technology as the commercial partner developing the processor.
NASA’s Jet Propulsion Laboratory said on May 12 that it had begun testing a next-generation radiation-hardened processor designed to raise the computing power available on future spacecraft. The processor is part of NASA’s High Performance Spaceflight Computing, or HPSC, project, a long-running effort to replace older flight computers that remain in use because they can survive radiation and temperature swings in space. Social posts over the weekend amplified a sharper claim — that the chip is “500 times” more powerful than current processors. NASA’s own materials support that number as an early test result, while describing the formal project target more conservatively as up to 100 times the computational capacity of current spaceflight computers. ### Where did the “500 times” figure come from? May 15 ScienceDaily coverage cited NASA’s Jet Propulsion Laboratory and said the radiation-hardened processor was showing performance “hundreds of times” beyond current spaceflight computers. The same item said the technology could support more independent spacecraft operations and more onboard science processing. NASA’s May 12 JPL release used two benchmarks at once. (jpl.nasa.gov) The article said the processor was “designed to provide up to 100 times the computational capacity of current spaceflight computers,” and added that engineers were still running radiation, thermal, shock and functional tests at JPL in Southern California. Recent secondary reports appear to draw the “approximately 500 times” figure from early functional results tied to that test campaign. (sciencedaily.com) NASA’s official project page still frames HPSC as a system intended to meet computing, power-management and fault-tolerance needs for missions through 2040 and beyond, rather than as a certified flight processor already ready for deployment. (jpl.nasa.gov) ### What exactly is NASA building? NASA describes HPSC as a next-generation flight computing system rather than a single conventional standalone CPU. JPL said the processor packs “the power of a full system-on-a-chip” into a device small enough to fit in the palm of a hand. Microchip Technology is NASA’s commercial partner on the effort. NASA’s HPSC project page says the program is meant to address performance, power management, fault tolerance and connectivity needs, and Microchip markets the related PIC64-HPSC line as a family of 64-bit radiation-hardened and radiation-tolerant microprocessors for space applications. (nasa.gov) (jpl.nasa.gov) ### Why are current space computers still so old? Current NASA missions often rely on older processors because radiation tolerance matters more than raw speed in deep space. JPL said spacecraft use chips developed years ago because they are hardy and reliable enough to survive the harsh space environment. ScienceDaily’s summary of the NASA release made the same point more directly: durable legacy chips can survive space, but they lack the performance needed for more advanced missions. (nasa.gov) That gap is what HPSC is meant to close. ### What could more onboard computing let spacecraft do? Jim Butler, HPSC project manager at JPL, said engineers are testing the chip against “high-fidelity landing scenarios from real NASA missions” that normally require power-intensive hardware to process large volumes of landing-sensor data. (jpl.nasa.gov) That points to one of the clearest use cases: faster onboard navigation and landing decisions when communication delays make direct control from Earth impractical. (sciencedaily.com) Eugene Schwanbeck, a program element manager in NASA’s Game Changing Development program at Langley Research Center, said the new multicore system is intended to be fault-tolerant, flexible and high-performing. NASA and ScienceDaily both said the processor could support autonomous spacecraft, faster onboard data analysis, and astronaut support on missions to the Moon and Mars. (jpl.nasa.gov) ### Is this chip already flying in space? No NASA release says the processor is already flying on an operational mission. The JPL update said testing began in February 2026 and is still focused on proving the chip can survive radiation, extreme temperatures and shock before use in spaceflight. NASA’s next public reference point is likely to come from further HPSC project updates, JPL test results, or Microchip’s product rollout around the PIC64-HPSC ecosystem, which both organizations have already begun describing publicly. (jpl.nasa.gov) (nasa.gov)