QUIK shows eFPGA on Intel 18A
- QuickLogic said on April 28, 2025 it delivered embedded field-programmable gate array hard intellectual property for a customer test chip built on Intel 18A. - The company said the Intel 18A eFPGA hard IP was created in six months with its Australis generator, targeting sub-5-nanometer-class power, performance, and area. - A March 17, 2026 follow-on Intel 18A contract suggests the work moved beyond one test chip. (ir.quicklogic.com)
An embedded field-programmable gate array is a small patch of rewritable logic built inside a chip, and QuickLogic says it has now delivered that block for Intel 18A. (ir.quicklogic.com) (intel.com) QuickLogic announced on April 28, 2025 that a customer selected its eFPGA hard intellectual property for a test chip on Intel 18A, Intel Foundry’s leading-edge process. (ir.quicklogic.com) (intel.com) The company said the delivery was the first eFPGA hard IP delivered for a sub-5-nanometer process node, and that its Australis generator produced the initial Intel 18A version in six months. (ir.quicklogic.com) (quicklogic.com) A field-programmable gate array is reconfigurable digital circuitry; embedding one inside an application-specific integrated circuit lets a chip designer change selected functions after tape-out instead of redesigning the whole chip. (quicklogic.com 1) (quicklogic.com 2) Intel 18A is the manufacturing platform underneath that claim. Intel says the node uses RibbonFET transistors and PowerVia backside power delivery, with up to 15% better performance per watt and 30% better chip density than Intel 3. (intel.com 1) (intel.com 2) QuickLogic joined Intel Foundry Accelerator IP and USMAG alliances in October 2024, when it said customer demand was pushing it to build customer-definable eFPGA hard IP cores for Intel 18A. (ir.quicklogic.com) The Intel 18A work did not stop at the first test chip. On March 17, 2026, QuickLogic announced a mid-6-figure contract to add architectural enhancements for a new customer ASIC on Intel 18A. (ir.quicklogic.com) QuickLogic said those changes lower power consumption, raise performance, and shrink the silicon area needed for high-density eFPGA cores, the standard three-way tradeoff chip designers call power, performance, and area. (ir.quicklogic.com) Intel has also used QuickLogic’s work to show broader foundry ecosystem traction. In an Intel Foundry post from August 2025, Intel said QuickLogic had delivered the world’s first eFPGA technology on Intel 18A for application-specific integrated circuit and system-on-chip developers. (community.intel.com) The practical pitch is narrower than a standalone FPGA card. A chipmaker can drop in a small reprogrammable block for security functions, interface glue, protocol updates, or specialized acceleration without committing an entire product to a full custom redesign. (quicklogic.com 1) (quicklogic.com 2) What QuickLogic has disclosed publicly is a delivered Intel 18A test-chip implementation in April 2025 and a follow-on Intel 18A customer ASIC contract in March 2026. The customer names, die size, and production schedule remain undisclosed. (ir.quicklogic.com) (ir.quicklogic.com)
