Samsung ramping foundry & memory
Samsung said it is mass‑producing next‑gen HBM4E and showcasing it for NVIDIA’s Vera Rubin platform at GTC, while social posts claim Samsung is also producing Groq’s LP30 at full capacity with shipments eyed for H2 2026 announced reported. The combination of HBM4E scale and foundry work makes Samsung a central node in the memory/fab arms race.
Samsung’s HBM4 line is already shipping at a measured 11.7 Gbps per pin, according to Samsung’s product release. (news.samsung.com) Samsung has publicly targeted an HBM4E performance envelope above 13–16 Gbps per pin and up to roughly 3.25–4.0 TB/s aggregate bandwidth in industry presentations reported at OCP and GTC, with different outlets citing 13 Gbps/3.25 TB/s and 16 Gbps/4.0 TB/s figures. (igorslab.de) Nvidia’s Vera Rubin rack spec sheets and keynote materials list very large HBM capacity and rack‑level bandwidth targets that forced vendors to recalibrate expectations — independent analysis shows supplier targets were trimmed toward ~10–11 Gbps for early Rubin shipments while rack‑level designs target tens of TB/s of HBM bandwidth. (nvidia.com) Multiple industry reports say Samsung’s foundry is expanding Groq wafer volumes from about 9,000 wafers to roughly 15,000 wafers as part of a production ramp, citing Samsung‑Groq foundry deals and recent demand signals. (biz.chosun.com) Nvidia’s GTC keynote named the Groq‑derived inference silicon (referenced as the Groq 3 LPU / LP30 in coverage) as being manufactured by Samsung and noted initial shipments slated for the back half of 2026, a statement that corresponded with a ~4–5% intraday lift in Samsung’s share price in Reuters‑reported trading. (koreajoongangdaily.joins.com) Groq’s prior public contract with Samsung Foundry and Samsung’s Taylor (Texas) 4nm SF4X capability are the technical foundation cited by press reports for moving LP‑class inference chips into volume wafer production at a U.S. site. (prnewswire.com)
