Siemens Debuts AI for Chip Design

Siemens is embedding agentic AI into its Electronic Design Automation (EDA) software to tackle the growing complexity and cost of chip verification. This move targets the critical "sign-off" phase at the register-transfer level (RTL), where identifying issues late in the process can lead to costly delays and require a complete re-analysis of the design. The industry-wide rate of first-pass silicon success has plummeted from 32% in 2020 to just 14% in 2024, highlighting the urgent need for more intelligent verification tools. The new Questa One Agentic Toolkit introduces five specialized AI agents to automate different parts of the workflow. These include an RTL Code Agent for generating synthesizable code, a Lint Agent for checking design errors, a CDC Agent for clock domain crossing verification, a Verification Planning Agent, and a Debug Agent for analyzing failures. This approach represents a shift from AI merely assisting engineers to autonomously executing complex tasks. Siemens' push into AI-driven EDA comes as it holds the third-largest market share at approximately 13%, trailing competitors Synopsys (31%) and Cadence (30%). The company, which entered the EDA market in a big way with its $4.5 billion acquisition of Mentor Graphics in 2016, is actively forming partnerships, including a recent one with NVIDIA to leverage their AI models and platforms. This AI integration is part of Siemens' broader Xcelerator portfolio and builds upon its previous AI-enabled tools. The company's EDA division, formerly Mentor Graphics, has been steadily acquiring other companies, such as Avery Design Systems and Insight EDA, to bolster its capabilities in verification and circuit reliability.