Molex Launches Co-Packaged Copper for 224Gbps Speeds
Molex has launched its Impress Co-Packaged Copper solutions, a near-ASIC connectivity system designed for next-generation data rates. The on-substrate connector and cable assembly is built to optimize signal integrity and power distribution at speeds of 224Gbps PAM-4 and beyond. The product aims to meet the connectivity demands of increasingly powerful AI chips.
- Co-packaged copper is an emerging alternative to co-packaged optics, offering lower latency, power, and cost for ultra-short reach interconnects like chip-to-chip and connections within a rack. However, its primary limitation is a shorter signal distance, around 4 meters, compared to kilometers for optics. - The technology directly addresses signal integrity challenges in high-speed AI accelerators by bypassing lossy printed circuit board (PCB) materials. Data is routed from connectors on the ASIC package through twinax cable to external I/O or backplane connectors. - Molex's "Impress" solution builds on its previous "NearStack On-the-Substrate (OTS)" connectors, of which the company has already delivered over one million units. This established expertise in near-ASIC connectivity provides a foundation for the new 224Gbps product. - The move to 224Gbps speeds relies on PAM-4 (Pulse Amplitude Modulation, 4-level) signaling. This modulation scheme doubles the data rate of the previous NRZ (Non-Return-to-Zero) standard without doubling the baud rate, which is crucial for managing power consumption. - While co-packaged copper excels in "scale-up" fabrics (connecting processors within a system), co-packaged optics (CPO) is seen as essential for "scale-out" applications that extend beyond a rack or row. The consensus is that copper and optics are complementary technologies addressing different needs within the data center. - The adoption of 224Gbps interconnects is driven by the explosive growth of AI and machine learning, which is pushing current data center architectures to their physical limits. Next-generation 1.6 Terabit (1.6T) links will be built using eight lanes of 224G signaling. - A key challenge at 224Gbps is managing channel impairments like signal loss and reflection. This has led to the emergence of powerful Digital Signal Processing (DSP)-based SERDES (Serializer/Deserializer) to ensure signal integrity over complex electrical channels. - Major industry players like Broadcom, Samtec, Marvell, and Amphenol are also actively developing and demonstrating co-packaged copper technologies, signaling a competitive landscape for next-generation interconnects.
