Astera Labs in focus

Astera Labs drew fresh attention after NVIDIA’s GTC 2026 because it sits in a narrow but important part of the AI stack: the links between chips, memory, and racks. Astera spent the conference talking less about raw compute and more about the plumbing around it. That is exactly where large AI systems keep running into trouble. The trouble is not mysterious. Training and inference systems now burn through memory and bandwidth almost as fast as vendors can add more GPUs. Models need more room for weights, activations, and KV cache. They also need faster ways to move data between accelerators without turning the whole rack into a traffic jam. Astera’s pitch is that these bottlenecks can be relieved with connectivity hardware instead of brute-force overbuying of compute. That is why Leo matters. Leo is Astera’s CXL memory controller, built to let servers expand, pool, and share memory beyond the limits of directly attached DRAM. The company says Leo supports both memory expansion and memory pooling, and frames it as a way to cut capacity waste while raising usable bandwidth and total memory available to AI and cloud workloads. Astera has also tied Leo directly to AI inference economics, including KV cache and recommendation systems, where memory size can be the real limiter long before arithmetic throughput is. Microsoft gave that story more weight in November, when Astera said Azure M-series virtual machines would become the first announced deployment of CXL-attached memory, using Leo to let customers evaluate memory expansion for real workloads. That memory story leads straight to the other reason investors started talking. NVIDIA’s NVLink Fusion opens its scale-up interconnect to a wider partner ecosystem, so hyperscalers and ASIC designers can build semi-custom systems that still plug into NVIDIA’s rack architecture. Astera was named as one of the first partners in that ecosystem when NVIDIA launched NVLink Fusion in May 2025. NVIDIA describes the platform as a way to integrate custom CPUs and accelerators with NVLink and OCP MGX rack-scale designs. Astera describes its role more bluntly: connectivity is becoming the new frontier of AI infrastructure. That is not marketing fluff. Once clusters get large enough, the value shifts from the individual chip to the way the whole rack behaves under load. A slower interconnect can waste an expensive accelerator. A memory-starved server can leave compute idle. A hard-to-debug fabric can delay deployment for months. Astera’s business exists in that gap. Its hardware sits between components, and its COSMOS software watches links, fleets, and reliability data at rack scale. The company is selling not just chips, but a way to make mixed systems act like one machine. That helps explain why the social chatter after GTC focused on bridge solutions rather than breakthrough silicon. Astera is not promising to beat NVIDIA at GPUs. It is trying to make existing and future GPU systems less wasteful. Leo points at the memory wall. NVLink Fusion points at the scale-up wall. Both are attempts to squeeze more useful work out of the same rack footprint. The market is reacting because that is a practical idea, not a glamorous one. Buying ever-larger GPU farms is the obvious answer to AI demand, but it is also the most expensive answer. If memory can be expanded with CXL instead of duplicating whole servers, and if custom silicon can join NVIDIA-style racks without forcing a full redesign, then a lot of AI infrastructure starts to look more modular than monolithic. Astera spent GTC 2026 making that case in talks with names like “Inference Tokenomics” and “Why Connectivity is the New Frontier of AI Infrastructure,” which is a good clue to where the company thinks the next bottleneck will show up.