TSMC says it will delay buying ASML High‑NA EUV tools, avoiding an early‑cost rush

- Taiwan Semiconductor Manufacturing Co. said it will not buy ASML’s High-NA extreme ultraviolet tools yet, telling its 2026 symposium current EUV remains sufficient. - TSMC executive Kevin Zhang said the more than €350 million machines are too expensive, and existing EUV can support its roadmap through 2029. - The stance shifts focus to yields, capacity and packaging as TSMC ramps A14, A16, 3nm and 2nm lines. (digitimes.com)

Chipmaking is a layer-printing business, and the newest printer from ASML is so expensive that TSMC says it can wait. Taiwan Semiconductor Manufacturing Co. told its North America Technology Symposium it does not plan to buy High-NA EUV tools yet. (digitimes.com) (technode.com) High-NA EUV is ASML’s next lithography machine, used to project ever-finer circuit patterns onto silicon. TSMC deputy co-chief operating officer Kevin Zhang said the company can keep “harvesting” existing EUV systems and does not need High-NA through 2029. (electronicsweekly.com) (bloomberg.com) The price is the point. TechNode and Electronics Weekly reported Zhang put a High-NA tool at more than €350 million, roughly double older EUV systems. (technode.com) (electronicsweekly.com) TSMC used the same event to show that its roadmap is still moving without that equipment. SemiEngineering reported the company added A13, A12 and N2U to a roadmap that now runs through 2029, while A16 production is slated for 2027. (semiengineering.com) That matters because leading-edge chip production is not just about the smallest patterning tool. It is also about how many good chips come off each wafer, how fast factories ramp, and how packaging technologies like CoWoS and SoIC connect compute dies and memory. (semiengineering.com) (news.synopsys.com) Capacity is tightening at the same time. TrendForce, citing supply-chain reporting, said TSMC’s 3nm monthly output is projected to reach about 180,000 wafers by the end of 2026, up from roughly 120,000 to 130,000 at the end of 2025. (trendforce.com) The same reports say 2nm output could approach 100,000 wafers per month by the end of 2026. Wccftech, summarizing supply-chain sources, said early 2nm capacity may be reserved mainly for top-end smartphone chips before broadening out. (wccftech.com) (trendforce.com) Design-tool vendors are lining up around that plan. Synopsys said on April 22 that it expanded certified design flows, interface IP and foundation IP across TSMC’s 3nm and 2nm families, as well as A16 and A14. (news.synopsys.com) (convergedigest.com) ASML still has customers for High-NA, and the machines remain central to the industry’s long-term scaling plans. TSMC’s message last week was narrower: for this part of its roadmap, it would rather spend on output and economics than rush into the most expensive tool first. (digitimes.com) (bloomberg.com)

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