Siemens Unveils AI for Chip Design

The move to agentic AI addresses the largest bottleneck in modern semiconductor development: verification. Industry studies show that verifying a chip's design to ensure it works correctly can consume up to 70% of the total project timeline, a growing challenge as chips integrate hundreds of billions of transistors. This verification crunch leads to costly delays and redesigns, known as "respins." Currently, only about 14% of complex chip designs achieve success on the first silicon run, forcing the majority of projects into expensive and time-consuming rework. Siemens EDA is one of the "Big Three" companies that dominate the Electronic Design Automation (EDA) market, alongside Synopsys and Cadence. All three are in a race to integrate AI into their toolsets, collaborating with major foundries like TSMC to create AI-driven design flows for the most advanced manufacturing processes. The introduction of "agentic" AI marks a significant shift from AI as a simple assistant to AI as an autonomous agent. Unlike previous tools that might suggest optimizations, agentic AI can independently reason, plan, and execute complex, multi-step tasks like generating and running verification tests. Competitors have similar offerings, such as the Synopsys.ai platform with its DSO.ai tool for design space optimization. The goal for all these platforms is to move engineers away from manual, repetitive tasks and allow them to focus on higher-level system architecture and innovation. Siemens is integrating this AI into its broader portfolio, including tools like Aprisa AI, which the company claims can deliver up to a 10% improvement in power, performance, and area (PPA). The company is also collaborating with partners like Caspia Technologies to use AI for enhanced security verification, guarding against sophisticated hardware attacks.