In-Orbit FPGA Reconfiguration for AI Updates

- FPGAs offer a power-efficient alternative to GPGPUs for onboard processing, a critical consideration for power-constrained spacecraft. While GPUs may provide higher raw computational throughput for complex neural network inference, FPGAs can be optimized for specific algorithms, leading to better performance-per-watt. - The on-orbit servicing market, which includes hardware upgrades, is projected to reach $4 billion by 2030. This trend supports the business case for reconfigurable systems, as satellites can be serviced and upgraded with new capabilities, rather than being replaced. - VORAGO Technologies utilizes a patented process called HARDSIL® to harden commercial semiconductor designs against radiation, which has been proven in multiple process generations including FinFET. Their rad-hard Arm Cortex-M4 microcontrollers can withstand up to 300 krad(Si) Total Ionizing Dose (TID) and are immune to single-event latch-up (SEL) above 110 MeV*cm2/mg. - The collaboration between VORAGO and AMD enables a VORAGO rad-hard MCU to manage the in-flight reconfiguration of AMD's space-grade Kintex UltraScale FPGAs. This is accomplished using the FPGA's serial reconfiguration interface, which is a simpler method than traditional reprogramming techniques. - Updating AI models on satellites presents significant challenges compared to terrestrial systems, including limited uplink bandwidth, constrained onboard memory and processing power, and the high risk of a failed update bricking the asset. The long operational lifespans of spacecraft, often exceeding 15 years, amplify the need for reliable update mechanisms. - Dynamic Partial Reconfiguration (DPR) allows specific sections of an FPGA's logic to be reprogrammed at runtime without halting the entire system. This is critical for applications requiring real-time adaptation to changing workloads or sensor inputs, as it avoids the overhead of a full chip reconfiguration. - Beyond single-event upsets (SEUs), designers must account for total ionizing dose (TID) effects, which are cumulative over the life of a mission and can degrade component performance. Mitigation strategies include radiation-hardened-by-design components and system-level approaches like triple-modular redundancy (TMR), where critical logic is triplicated and a voting system corrects errors. - The RISC-V architecture is gaining traction in space applications, with radiation-tolerant SoC FPGAs, such as Microchip's RT PolarFire, incorporating RISC-V processors. This open-source ISA allows for greater customization and flexibility in designing integrated command, data handling, and payload control systems.