NASA unveils 500x space processor

NASA said on May 12 that its High Performance Spaceflight Computing processor had moved into testing, with early indications showing performance as high as 500 times that of radiation-hardened chips now used in spacecraft. The chip is designed to survive deep-space radiation while handling heavier onboard computing loads, including autonomy, image processing and data analysis, according to NASA and Jet Propulsion Laboratory materials. The announcement adds detail to a program NASA has been developing with industry partner Microchip Technology since at least 2022. It also clarifies a point that drew attention online: NASA’s broad program pages describe a gain of more than 100 times, while JPL’s latest testing update cited 500 times in early results. ### Why are there two different performance numbers? NASA’s May 12 JPL article said the processor was “operating at 500 times the performance” of the radiation-hardened chips currently in use, based on indications from testing that began in February. The same article said the processor is being put through radiation, thermal, shock and functional tests at JPL. NASA’s main HPSC project page and a separate Space Technology Mission Directorate article use a lower, broader benchmark. (nasa.gov) Those pages say the system-on-a-chip delivers “over 100 times” the computing capability of current space processors. NASA did not present the two figures in the same document, but the agency materials suggest they refer to different contexts: a program-level capability target on one hand, and early test indications for the radiation-hardened chip on the other. (nasa.gov) That is an inference based on the wording of the separate NASA pages. ### What problem is this chip meant to solve on spacecraft? (nasa.gov) NASA’s HPSC page says missions beyond Earth orbit face communication delays that force more work to be done autonomously and in real time onboard, without help from ground controllers. The agency lists advanced autonomy, artificial intelligence, machine learning, image and signal processing, data-flow management, and object detection among the workloads it wants the processor to handle. (nasa.gov) JPL said current spacecraft often rely on older processors because those chips are proven to withstand the harsh space environment. The tradeoff, NASA said, is that legacy hardware limits the speed of onboard analysis and constrains the kinds of autonomous functions future missions can run. ### What makes the processor different from older space computers? NASA’s July 2024 FAQ describes HPSC as a RISC-V-based system on a chip with a heterogeneous multi-core design. (nasa.gov) The document says the processor includes vector engines for AI and machine learning workloads, user-controllable power islands to manage energy use, and radiation-hardening and fault-tolerance features across hardware and software. (nasa.gov) The same FAQ says HPSC includes a 240-gigabit time-sensitive networking Ethernet switch and interfaces for mission-specific accelerators. NASA’s program page says the architecture is meant to scale across missions with different power, size and performance requirements. ### Who is building it with NASA? NASA’s project page lists Jet Propulsion Laboratory as the lead center and says the HPSC contract was awarded in August 2022. (nasa.gov) The FAQ says the processor was developed in collaboration with JPL and industry partners led by Microchip Technology. NASA’s Space Technology Mission Directorate article describes the effort as a public-private partnership between NASA and Microchip, supported by a wider network of academic and industry partners. (nasa.gov) That article also says the processor family includes both radiation-hardened versions for deep-space and lunar or Mars missions, and radiation-tolerant versions aimed at commercial low-Earth-orbit satellites. (nasa.gov) ### What testing is happening now? JPL said testing began in February and includes radiation, thermal and shock testing, along with a broader functional campaign. Jim Butler, the HPSC project manager at JPL, said the team is also using high-fidelity landing scenarios from real NASA missions to measure how the chip handles large volumes of landing-sensor data. NASA said the processor must prove it can keep operating through electromagnetic radiation, extreme temperature swings and other conditions that can damage electronics or trigger errors that push spacecraft into safe mode. (nasa.gov) The agency said testing will continue for several months. ### What comes next for the program? NASA’s HPSC page says the project is intended to meet mission needs through 2040 and beyond. (nasa.gov) The agency has not named a flight mission for the processor in the May 12 testing update, but it said the current campaign is focused on qualifying the chip for harsh-space use and validating performance in mission-like scenarios. The next concrete milestone in NASA’s public materials is the continuation of JPL’s multi-month test program. (nasa.gov) Microchip Technology remains the named industry lead, and JPL remains the lead NASA center as the processor moves through qualification work. (nasa.gov)