Opus 4.7 Agentic CAD

Chip layout work that used to depend on specialist scripts and manual cleanup is starting to show up in general-purpose AI demos. Anthropic released Claude Opus 4.7 on April 16, 2026, pitching it as stronger on long, difficult software tasks and autonomous tool use. (anthropic.com) In chip design, a design-rule check is the factory rulebook pass: software scans a layout to catch shapes or spacing that a foundry cannot reliably manufacture. Cadence says signoff-quality design-rule checking is a core step in custom integrated-circuit layout before tape-out. (cadence.com) Routing is the wiring step after components are placed, when software has to connect blocks on the chip without breaking those manufacturing rules. Cadence says its integrated place-and-route tools automate that step, and academic literature describes detailed routing as a critical stage for advanced-node designs. (cadence.com) (vlsicad.ucsd.edu) That is why the recent “agentic CAD” demos drew attention: they showed an AI agent taking on design-rule checks and auto-routing tasks inside a very-large-scale integration, or VLSI, workflow. The public discussion around the demos came from engineer Kshitij Vaze, who framed them as evidence that buyers may now pay for services that wrap automation into onboarding and methodology setup. (threadreaderapp.com) (anthropic.com) Anthropic’s own product materials do not mention chip design by name, but they do describe the ingredients that make those demos possible. The company says Opus 4.7 can handle complex, long-running tasks, verify its own outputs, and work through the Claude Agent SDK, which can read files, run commands, edit code, and call tools. (anthropic.com) (code.claude.com) The shift is less about replacing electronic-design-automation software than about who operates it. A physical-design engineer who once glued together command-line tools, rule decks, and custom scripts can now test whether an agent can interpret the flow, launch checks, inspect violations, and try fixes with less handholding. (code.claude.com) (cadence.com) That creates a services opening as much as a software one. If a model can execute a house routing flow or a design-rule-check debug loop, chip teams still need someone to package prompts, guardrails, tool permissions, and workflow conventions into something a new customer can actually deploy. (anthropic.com) (code.claude.com) There are limits. Modern routing and physical verification are constrained by foundry rule decks, proprietary design databases, and signoff tools from vendors such as Cadence and Siemens, and published routing research still treats design-rule-clean output as a hard technical target, not a casual coding task. (cadence.com) (vlsicad.ucsd.edu) So the immediate story is not that large language models have replaced chip-design software. It is that a model released on April 16 is already being used to show that some of the glue work around design-rule checks and routing can be delegated, and that is enough to change how automation gets sold. (anthropic.com 1) (anthropic.com 2)