RISC-V Gains Ground in Auto and HPC

The open, modular nature of the RISC-V instruction set architecture (ISA) allows for significant customization, enabling chip designers to create specialized processors optimized for specific automotive or HPC workloads without licensing fees. This contrasts with proprietary architectures like ARM, which historically dominated the automotive space but involves licensing costs and offers less design flexibility. In the automotive sector, companies like SiFive, Renesas, and Andes Technology are key players, with SiFive holding an estimated 35% of the RISC-V auto market share. Major automotive suppliers and manufacturers, including Bosch, Infineon, NXP, and Qualcomm, have formed a joint venture to accelerate the development of RISC-V-based hardware, initially targeting automotive applications. This collaboration aims to create compatible products and reference architectures to streamline adoption. The shift to software-defined vehicles is a major driver for RISC-V adoption, as its flexibility supports the consolidation of multiple functions like ADAS, infotainment, and connectivity onto single, power-efficient domain controllers. RISC-V cores are being designed to meet stringent automotive safety standards like ISO 26262 and cybersecurity standards such as ISO/SAE 21434, a crucial requirement for safety-critical systems. In high-performance computing, RISC-V offers a path to greater energy efficiency and performance through specialization, a critical factor as the demand for sustainable computing grows. The modularity of the RISC-V ISA allows hardware to be tailored precisely to HPC workload requirements, potentially reducing power consumption and cost compared to established, off-the-shelf components. The ExCALIBUR testbed, hosted by EPCC at the University of Edinburgh, provides a vital resource for the HPC community to port and benchmark scientific applications on RISC-V hardware. It offers access to both physical RISC-V CPUs for mature solutions and reconfigurable FPGAs (soft-cores) that allow researchers to experiment with next-generation and customized processor designs. While the RISC-V ecosystem is still maturing compared to ARM, its open-source nature fosters community collaboration on software and tools, which can lower the development burden for individual companies. However, significant gaps remain, particularly in the availability of advanced performance profilers and debuggers crucial for HPC development.