MediaTek Taps Intel for Advanced Chip Packaging
MediaTek has placed a major order with Intel Foundry for packaging services related to its TPU v8e chips, according to reports. The deal, which includes a prepayment, will leverage Intel's Embedded Multi-die Interconnect Bridge (EMIB) technology, signaling a significant shift in advanced packaging partnerships within the semiconductor industry.
Intel's EMIB technology is a direct competitor to TSMC's CoWoS, which has been the dominant force in advanced packaging for AI accelerators. Unlike CoWoS, which uses a large, expensive silicon interposer to connect chiplets, EMIB embeds smaller, more cost-effective silicon bridges directly into the package substrate. This approach can reduce packaging costs by 30-40% and allows for the creation of much larger and more complex chip systems. This deal is a significant move for MediaTek to diversify its supply chain beyond TSMC. While MediaTek has a strong, ongoing partnership with TSMC for both chip fabrication and CoWoS packaging for Google's TPUs, the demand for advanced packaging is outstripping supply. Tapping Intel provides a crucial second source, mitigating risks associated with capacity constraints and geopolitical uncertainties in Taiwan. For Intel Foundry Services (IFS), this is a major validation of its "IDM 2.0" strategy. Securing a high-volume customer like MediaTek for a cutting-edge AI product demonstrates that its packaging technology is a viable alternative for the high-performance computing market. Intel has been building a roster of foundry partners, including Microsoft and Qualcomm, to challenge TSMC's dominance. The move towards heterogeneous integration, or "chiplets," is a key driver for the entire advanced packaging market, which is projected to grow significantly. As traditional Moore's Law scaling slows, combining multiple specialized dies in a single package is how performance gains are being achieved for AI and machine learning workloads. Intel's EMIB is particularly well-suited for integrating large, custom ASICs like Google's TPUs. Intel's packaging roadmap includes enhancements like EMIB-T, which adds through-silicon vias (TSVs) for better power delivery to high-bandwidth memory (HBM), a critical component for AI accelerators. The company is also combining EMIB with its Foveros 3D stacking technology, creating even denser and more powerful integrated systems. This technical capability, coupled with expanding US-based manufacturing capacity, positions Intel as a key player in the future of semiconductor assembly.
