NVIDIA shifts up the stack
NVIDIA is moving beyond GPUs into networking and vertical AI infrastructure after GTC — networking revenue jumped 263% as the company pushes full-stack AI solutions and 'AI factories'. For students, that means knowing distributed computing and cloud-native ML pipelines is becoming as important as single-node model code. (aol.com) (blogs.nvidia.com)
NVIDIA reported record quarterly revenue of $68.1 billion for the fourth quarter ended January 25, 2026, with Data Center sales of $62.3 billion. (nvidianews.nvidia.com) The company disclosed $10.98 billion in Data Center networking revenue in the same quarter, driven in part by demand for NVLink fabric across GB200 and GB300 rack designs. (aol.com) At GTC 2026 Jensen Huang framed an “AI factory” era and highlighted new physical-AI platforms and models including NVIDIA Cosmos 3, Isaac GR00T N1.7, and Alpamayo 1.5 as infrastructure-anchored products for robotics, vehicles and industrial workloads. (blogs.nvidia.com) NVIDIA’s Spectrum‑X Ethernet, BlueField‑3 SuperNICs and co‑packaged photonics were presented as the fabric for multi‑rack AI scale — Spectrum‑X claims about 1.6× AI cloud performance uplift and photonics designs promise ~3.5× power-efficiency improvements for hyperscale fabrics. (nvidia.com) The Blackwell GB200/GB300 NVL72 rack platforms ship with a fifth‑generation NVLink scale‑up fabric and are being offered as cloud instances by providers such as CoreWeave to expose rack‑scale topologies for large‑model training. (docs.nvidia.com) Hyperscalers and enterprise cloud players announced NVIDIA‑based offerings and standardizations at GTC — AWS and Google Cloud detailed NVIDIA-backed GPU scale‑out services while Meta and Oracle have standardized on Spectrum‑X Ethernet switches. (virtualizationreview.com) NVIDIA BlueField DPUs and SuperNICs are positioned to offload networking, storage and security functions but have required security advisories and patches (NVIDIA Product Security bulletins and multiple CVEs), creating a new infrastructure security surface for operator and secure‑coding practices. (docs.nvidia.com)
