MIT Develops 'Fusion-Aware' AI Accelerator Mapper
Researchers at MIT have developed a “fusion-aware mapper” designed to dynamically assign computational tasks across heterogeneous accelerators like FPGAs, GPUs, and custom ASICs. The system partitions AI and sensor fusion pipelines to match each stage with the most suitable hardware, a critical function for avionics and autonomous flight control. In simulations of avionics workloads, the technique reportedly reduced latency by up to 30% and energy consumption by 25%.
- The core innovation of the MIT research, titled "Fast and Fusiest: An Optimal Fusion-Aware Mapper for Accelerator Modeling and Evaluation" (FFM), is an algorithm that finds the most efficient way to schedule computational tasks on heterogeneous accelerators. Its primary advantage is overcoming the exponential growth in search complexity that hobbled previous mappers, making it over 1000 times faster at finding optimal mappings for complex workloads like Transformers. - The key technique is "fusion," which minimizes costly off-chip DRAM access by strategically keeping intermediate data on-chip between different computation steps. The FFM algorithm excels at this by pruning large sets of suboptimal "partial mappings" early in the search process, allowing it to scale linearly with workload complexity instead of exponentially. - The research was authored by Tanner Andrulis, Michael Gilbert, Vivienne Sze, and Joel S. Emer. This work is significant for aerospace because avionics systems increasingly use a mix of FPGAs, ASICs, and GPUs to handle computationally intensive, real-time tasks within tight size, weight, and power (SWaP) constraints. - In aerospace, guaranteeing that the right data is processed and sent to actuators at the right time is a critical safety requirement. The unpredictable latency caused by resource sharing and inefficient data movement in heterogeneous systems can impact flight control stability, making optimized mapping a key enabler for advanced autonomous systems. - While the research focuses on performance, its application in aerospace would face significant certification hurdles under standards like DO-178C. Certifying AI/ML components is a major challenge due to their complexity and the difficulty in providing deterministic evidence of their behavior, especially for safety-critical functions designated at Design Assurance Level (DAL) A. - Current guidance for AI/ML in aviation often restricts its use to lower-criticality applications (DAL-D) or requires traditional deterministic systems to act as an overseer. The non-deterministic nature of some advanced AI and the difficulty in tracing requirements to code in neural networks complicates compliance with the rigorous verification objectives of DO-178C. - The move toward multicore and heterogeneous systems in avionics is driven by the need for more computational power for autonomous functions. However, certification for these complex systems is already a challenge, as interference between components can cause unpredictable spikes in task execution times, violating real-time constraints. - The FFM's ability to provide an optimal, predictable mapping could potentially help in the verification and validation process required for certification. By creating a deterministic schedule for tasks and data movement, it could help build the safety case needed to prove that the system will meet its hard real-time deadlines under all conditions, a fundamental requirement for DO-178C compliance.
