Google taps Intel EMIB packaging

Artificial intelligence chips are getting too large to build as one slab of silicon, so companies split them into chiplets and reconnect them inside one package. Intel’s EMIB is one way to make those short, dense links. (intel.com) Reports published April 27 and April 28 say Google plans to use Intel Foundry’s EMIB packaging for a future Tensor Processing Unit, or TPU, rather than relying only on Taiwan Semiconductor Manufacturing Co. packaging. (wccftech.com) (onmsft.com) The reporting points to a next-generation Google accelerator sometimes labeled TPUv8e or TPU v9 in supply-chain coverage, but Google has not publicly confirmed the product name, timing, or supplier. (wccftech.com) (trendforce.com) EMIB, short for Embedded Multi-die Interconnect Bridge, places tiny silicon bridges inside the package substrate so chiplets can talk across short distances without a full silicon interposer under the whole package. Intel markets that as a way to cut cost and scale large designs. (intel.com 1) (intel.com 2) Intel said in March that EMIB-T can support systems larger than six times the reticle size today, more than eight times this year, and more than 12 times by 2028. Reticle size is the maximum area a lithography tool can print in one exposure, so bigger AI chips increasingly have to be stitched together from smaller pieces. (intel.com) That matters because Google’s latest publicly available TPU is TPU7x, the first Ironwood-family chip, which Google says is its seventh-generation TPU and made generally available on March 31, 2026. Any Intel-packaged follow-on part would sit beyond hardware Google is already selling on Google Cloud. (cloud.google.com 1) (cloud.google.com 2) Google said Ironwood delivers 10 times the peak performance of TPU v5p and more than four times better performance per chip than TPU v6e for training and inference. Those gains show why packaging has become a bottleneck: each generation wants more compute tiles, more memory, and more power in the same footprint. (cloud.google.com) Intel has been pitching packaging as a foundry product in its own right, not just an add-on to Intel-made silicon. The company says its Data Center GPU Max package used EMIB 3.5D to connect 47 active tiles across five process nodes in one mass-produced system. (intel.com) TrendForce reported earlier this month that Google and Amazon were weighing Intel packaging for custom AI chips, citing prior reporting and Intel disclosures about expected customer commitments in the second half of 2026. That leaves this Google report in the category of credible supply-chain signal, not confirmed contract announcement. (trendforce.com) If Google does move a future TPU package to Intel, the shift would show up first in assembly and integration, not necessarily in who fabricates the compute die. In the AI chip race, that back-end step is now big enough to decide who can ship the next system on time. (intel.com) (trendforce.com)