TSMC posts 66% gross margin
- Taiwan Semiconductor Manufacturing Co. reported first-quarter 2026 gross margin of 66.2% on April 16, beating its own outlook as artificial-intelligence chip demand lifted revenue, utilization and profit across advanced manufacturing lines. - First-quarter revenue reached US$35.9 billion and net income NT$572.48 billion, while chips made on 7-nanometer and smaller processes contributed 74% of wafer revenue and second-quarter margin guidance stayed above 65%. - Synopsys then said on April 22 its latest design tools and interface blocks were ready for TSMC’s 3-nanometer, 2-nanometer and newer nodes, underscoring how AI demand is pulling the whole chip stack forward. (synopsys.com)
Taiwan Semiconductor Manufacturing Co. posted a 66.2% gross margin in the first quarter, its highest in years, as demand for artificial-intelligence chips kept its most advanced factories busy. (tsmc.com 1) (tsmc.com 2) TSMC said on April 16 that first-quarter revenue rose 35.1% year over year to NT$1.134 trillion, or US$35.9 billion, and net income climbed 58.3% to NT$572.48 billion. Diluted earnings per share reached NT$22.08. (tsmc.com 1) (tsmc.com 2) Chief Financial Officer Wendell Huang said gross margin rose 3.9 percentage points from the prior quarter, helped by cost-improvement efforts, higher capacity utilization and a favorable exchange rate. TSMC guided second-quarter gross margin to 65.5% to 67.5%. (tsmc.com 1) (tsmc.com 2) A chip “node” is the generation of manufacturing technology, and smaller nodes let designers pack in more transistors, usually improving speed or power use. TSMC said 3-nanometer chips made up 22% of wafer revenue in the quarter, while 5-nanometer contributed 36% and 7-nanometer 16%. (tsmc.com) Those figures show how concentrated TSMC’s business has become around advanced production: 7-nanometer and below accounted for 74% of wafer revenue in the quarter. CNBC reported analysts see that mix supporting pricing power with customers such as Nvidia and Apple. (tsmc.com) (cnbc.com) The software side of that manufacturing race moved four business days later. Synopsys said on April 22 that it had expanded silicon-proven interface blocks, artificial-intelligence-assisted electronic design automation flows and packaging support for TSMC’s 3-nanometer and 2-nanometer families, plus A16 and A14. (synopsys.com) Electronic design automation is the software chip engineers use to draw, test and verify circuits before a factory prints them in silicon. Synopsys said its announcement included successful silicon bring-up of Universal Chiplet Interconnect Express intellectual property on TSMC’s N2P process and certified digital and analog flows for newer nodes. (synopsys.com) Reports about Apple’s future A20 processor and possible 12-gigabyte memory in the iPhone 18 remain unconfirmed by Apple and were circulating in trade and rumor outlets as of April 26. What is confirmed is that TSMC plans volume production for 2-nanometer in the second half of 2025 and cites strong demand from smartphone and high-performance computing customers. (tsmc.com) (onmsft.com) TSMC’s quarter put a hard number on the payoff from that roadmap: more of the company’s revenue is coming from the smallest, most expensive chips, and the tools to design the next wave are already being lined up. (tsmc.com) (synopsys.com)
